3.
SPECIFICATIONS
MELSEC-A
(2)
Output signals
(PC CPU
-
AJ71C24)
There are
16
output signals:
Y(n+l)O
to
Y(n+l)F
are turned
ON/OFF
by
the
AJ71C24.
Table
3.6
Output
Slgnalr Llst
c
I
I
When
this
signal
i8
turned
ON
by the sequence program in
buffer memory is transmitted from the AJ71C24 to an external
device. (After XnO is turnod
ON,
Y(n+c)O
is turned
OFF.
Send
92,
the
no-protocol mode/bidirectional mode, data writton to the
M+')
O
request
-
This signal turns
ON
in
the
no-protocol rnodo/bidirectional
Received
AJ71C24 buffer memory. (After Xnl is turned
OFF,
Y(n+c)l
is
completed
9.2,102
received from an external device. This data is stored in the
0
-
data read
Y (n+l)l
mode,
when
the PC CPU
ha8
completed reading the data
turned
OFF.
Y (n+l)
2
to
-
Y (n+r)F
Resewed
-
-
-
IMPORTANT~
I
Y(n+1)2
to
Y(n+l)F
are reserved for system use only.
AJ71C24
functions
cannot be guaranteed
if
these signals are turned
ON
or
OFF
by a se-
quence program.
I
Example: Use
of
input signals Xn4 to Xn6.
Request from computer
I
I
I
I
I
I I
I
I
1
I
An1
c24
I
I
hZh
Request
dl
ACK
or
dl
ACK
or
II
I
I
I
I
I
I
I
XI76
I
I
I
I
Xn5
I
I
I
I
I
I I
xn4
7
I
I
J
I
,.-
,I
I
cl
L.
1
1
n
4
7
1
d
'i
!
'-
1
3-35
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