En-35
English
1T/2T Memory Timing
When the DRAM Timing Mode sets to [DCT 0], [DCT1] or [Both], the eld is adjust-
able. This eld controls the SDRAM command rate. Selecting [1T] makes SDRAM
signal controller to run at 1T (T=clock cycles) rate. Selecting [2T] makes SDRAM
signal controller run at 2T rate.
DCT Unganged Mode
This feature is used to Integrate two 64-bit DCTs into a 128-bit interface.
Bank Interleaving
Bank Interleaving is an important parameter for improving overclocking capability
of memory. It allows system to access multiple banks simultaneously.
Power Down Enable
This is a memory power-saving technology. When the system does not access mem-
ory over a period of time, it will automatically reduce the memory power supply.
MemClk Tristate C3/ATLVID
This setting allows you to enable/disable the MemClk Tristating during C3 and
ATLVID.
FSB/DRAM Ratio
This item allows you to select the ratio of FSB/ DRAM.
Adjusted DRAM Frequency (MHz)
It shows the adjusted Memory frequency. Read-only.
Onboard VGA Core Over Clock
This item allows you to overclock the onboard VGA.
Onboard VGA Clock
This item will appear when Onboard VGA Over Clock sets to [Enabled]. It allows you
to adjust the onboard VGA clock.
HT Link Control
Press <Enter> to enter the sub-menu.
HT Incoming/ Outgoing Link Width
These items allow you to set the Hyper-Transport Link width. Setting to [Auto],
the system will detect the HT link width automatically.
HT Link Speed
This item allows you to set the Hyper-Transport Link speed. Setting to [Auto], the system
will detect the HT link speed automatically.
Adjusted HT Link Frequency (MHz)
It shows the adjusted HT Link frequency. Read-only.
Adjust PCI-E Frequency (MHz)
This eld allows you to select the PCIE frequency (in MHz).
Auto Disable DRAM/PCI Frequency
When set to [Enabled], the system will remove (turn o) clocks from empty DRAM/ PCI
slots to minimize the electromagnetic interference (EMI).
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