MSI PH61A-P35 (B3)

BIOS Setup
MS-7732
Chapter 3
3-13
BIOS Setup
MS-7732
Chapter 3
OC Gene Button Operaton
Ths 󰘰eld s used to enable/ dsable OC Gene functon.
DRAM Frequency
Ths settng controls the memory frequency to enable the memory to run at d󰘯erent
frequency combnatons.
Adjusted DRAM Frequency
It shows the adjusted DRAM frequency. Read-only.
DRAM Tmng Mode
Select whether DRAM tmng s controlled by the SPD (Seral Presence Detect) EE
-
PROM on the DRAM module. Settng to [Auto] enables DRAM tmngs and the followng
“Advanced DRAM Con󰘰guraton” sub-menu to be determned by BIOS based on the
con󰘰guratons on the SPD. Selectng [Lnk] or [Unlnk] allows users to con󰘰gure the
DRAM tmngs and the followng related “Advanced DRAM Con󰘰guraton” sub-menu
manually.
Advanced DRAM Con󰘰guraton
Press <Enter> to enter the sub-menu.
Command Rate
Ths settng controls the DRAM command rate.
tCL
Ths controls the CAS latency, whch determnes the tmng delay (n clock cycles)
before SDRAM starts a read command after recevng t.
tRCD
When DRAM s refreshed, both rows and columns are addressed separately. Ths
setup tem allows you to determne the tmng of the transton from RAS (row ad
-
dress strobe) to CAS (column address strobe). The less the clock cycles, the faster
the DRAM performance.
tRP
Ths settng controls the number of cycles for Row Address Strobe (RAS) to be
allowed to precharge. If nsu󰘲cent tme s allowed for the RAS to accumulate ts
charge before DRAM refresh, refreshng may be ncomplete and DRAM may fal
to retan data. Ths tem apples only when synchronous DRAM s nstalled n the
system.
▶
▶
▶
▶
▶
▶
▶
▶
▶