2. Interface Circuit
2-1. Sync Interface Circuit
(a)
The outputs of this circuit are the positive H Sync and V Sync.
The following three signals are designed as input signals.
(i)
SEPARATE SYNC
(ii)
COMPOSITE SYNC
(iii)
SYNC ON GREEN
POSITIVE/NEGATIVE polarity
POSITIVE/NEGATIVE polarity
NEGATIVE polarity
SYNC ON
G
-
vj-+
“SYNC
H SEPARATE
-
*
H V COMPOSITE
SHAPER
I
V SEPARATE
-
(Fig 2-l-l) BLOCK-DIAGRAM of the SYNC INTERFACE CIRCUIT
(b) The outputs of the distinction circuit are as follows:
These outputs are supplied to
IC851
(CPU) on the main PWB.
l H SYNC signals’s polarity (CN-A PIN 1)
(
L: POSITIVE POLARITY
H: NEGATIVE POLARITY
l V SYNC signal’s polarity (CN-A PIN 2)
1
L: POSITIVE POLARITY
H: NEGATIVE POLARITY
. V SYNC STATE (EXISTENCE)(CN-A PIN 3)
L: NONE
H: AVAILABLE
NOTE:
L Low level of TTL
H High level of
TTL
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