MANUEL STA46 Modbus TCP
JP Viskovic 30/08/2005 OEE-F 3
Table of content
1.
SPECIFICATIONS............................................................................................................................................. 4
1-1 SUPPORTED COMMAND LIST.............................................................................................................................. 4
1-2 MEMORY MAP................................................................................................................................................... 4
1-2-0 Used by ModbusTCP PLC program ....................................................................................................... 4
1-2-1 PLC area accessible by Modbus TCP request.......................................................................................4
1-3 MODBUS TCP FRAME FORMAT ......................................................................................................................... 5
1-3-0 MBAP Header description ...................................................................................................................... 5
1-4 FUNCTION CODE .............................................................................................................................................. 6
1-4-0 I/O memory area (CIO) Read Multiple Coils........................................................................................... 6
1-4-1 I/O memory area (CIO) Read Multiple Coils........................................................................................... 7
1-4-2 I/O memory area (DM) Read Multiple Registers ....................................................................................8
1-4-3 I/O memory area (CIO) Read Multiple Registers.................................................................................... 9
1-4-4 I/O memory area Write Single Coil ....................................................................................................... 10
1-4-5 I/O memory area (DM) Write Single Register....................................................................................... 11
1-4-6 Echo back test ...................................................................................................................................... 12
1-4-7 I/O memory area (DM) Write Multiple Registers...................................................................................13
1-5 ERROR RESPONSE.......................................................................................................................................... 14
1-6 STATUS COUNTER .......................................................................................................................................... 14