Pin
No.
Port Descriptions I/O (V)
1 CVSS1 GND - 0
2 - - - -
3 CVSS2 GND - 0
4 DVSS1 I/O system (3.3V) power
supply
- 3.3
5 A10 Address bus of FLASH ROM O 0
6 - - - -
7 A11 Address bus of FLASH ROM O 3.3
8 A12 O 3.3
9 A13 O 3.3
10 A14 O 3.3
11 A15 O 3.3
12 /
CVDD1
CORE CPU system (1.6V)
power supply
- 1.6
13 - - - -
14 DVSS1 GND - 0
15 CVSS3 GND - 0
16 /
CVDD2
I/O system (3.3V) power
supply
- 1.6
17 - - - -
18 - - - -
19 - - - -
20 nPS FLASH ROM selection
signal
O 3.3
21 - - - -
22 - - - -
23 R/W Lead/light signal to FLASH
ROM
O 3.3
24
nMSTRB
Memory access signal O 3.3
25 - - - -
26 - - - -
27 MUTE Mute signal output (H:Mute
on)
O 0
28 - - - -
29 - - - -
30 - - - -
31 SUBO SUBO input I 0
32 - Operation mode setting
(external pull-up)
I 3.3
33 DVDD2 I/O system (3.3V) power
supply
- 3.3
34 CVSS4 GND - 0
35 (GND) GND I 0
36 - - - -
10