Parker TC1475 - Circuit Analysis; Tuning circuit; Picture IF circuit

TC1475 / TC2175 / TF2139 16
Circuit Analysis
12.
Circuit Analysis
P+
Vol-
Vol+
MUTE
SLEEP
DISP/LOCK
RECALL
MENU
PIC
SOUND-MODE
D-MODE
Channel add key
Volume lessen key
Volume add kye
Mute key
Sleep key
Display/lock key
RECALL key
Menu key
Picture menu key
SOUND-MODE key
Factory key
00010001
00010010
00010011
00010100
00010101
00010110
00010111
00011100
0001101
00011110
00101100
11
12
13
14
15
16
17
1C
1D
1E
2C
11
12
13
14
15
16
17
1C
1D
1E
2C
0x13
0x14
0x10
0x16
0x0f
0x1b
0x1a
0x0e
0x1c
0x1d
0x11
0x1b
0x1e
0x1f
0x15
0x19
0x14
0x0e
0x10
0x0c
0b
0x1d
12.1．Tuning circuit：
Buildup by frequency synthesized, PLL tuning, controlled by I2C bus tuner
and some individual components. Tuning process controlled by correlation
pins of UOC TMPA8873-XXXX. Pin57 & pin58 of CPU output I2C tuning
data for SCL & SDA of tuner.
FS tuner introduced in this chassis, cooperate with SCL & SDA data from
pin57 & pin58 of N101, processing FS auto tuning. 33V for tuner supplied
by 110V(130V), divided by R518 and stabilized voltage by N505.
Frequency synthesized fashion is also called PLL frequency synthesized
fashion. It is the CPU controlled by channel subscribe program、band
switch and data from RC receiver and give the band switch signal. CPU set
frequency divide ratio for variable frequency divider of PLL. Variable
frequency divider dividing the local oscillation frequency from tuner and
compare the phase with benchmark frequency, adjust local oscillation
frequency accord with the local oscillation frequency needed by each chan-
nel.
12.2.Picture IF circuit：
The IF signal from tuner enter into SAW filter Z101(F45C) after amplified by
Pre-Amp built up by V103 and so forth, filtered accordance with IF characte-
ristic and enter TMPA8873-XXXX and output PIF demodulation
signal(CVBS) from pin30, pass through the emitter follower buildup by R155
、R156、V104、R158, coupled to pin26 (inner switch)of TMPA8873-
XXXX by C147.