Philips 201T1SB/00 - External Interface; Video Signal Requirements

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3.3 External Interface
3.3.1 Video Signal Requirements
y CVBS
Input
1000mVpp (including 300 mV sync level), terminated with input impedance of 75Ω.
y S-Video
Input
Y: 1000mVpp, C: 300mVpp, terminated with input impedance of 75Ω.
y Component
Video Input
Y: 1000mVpp, PbPr: ±350mVpp, terminated with input impedance of 75Ω. 480i/p, 576i/p, 720p,
1080i/p signal handling capability.
y HD Ready
HD ready logo required.
Display engine:
¾ The minimum native resolution of the display (e.g. LCD, PDP) or display engine (e.g. DLP) is
720 physical lines in wide aspect ratio.
Video Interfaces:
¾ The display device accepts HD input via:
 Analog YPbPr. “HD ready” displays support analog YPbPr as a HD input format to allow full
compatibility with today's HD video sources in the market. Support of the YPbPr signal
should be through common industry standard connectors directly on the HD ready display
or through an adaptor easily accessible to the consumer; and:
¾ DVI or HDMI HD capable inputs accept the following HD video formats:
 1280x720 @ 50 and 60Hz progressive scan (“720p”)
 1920x1080 @ 50 and 60Hz interlaced (“1080i”)
¾ The DVI or HDMI input supports copy protection (HDCP).