Philips 32PFT5500/12 - Front-End Analogue and DVB-T;T2, DVB-C; DVB S;S2, ISDB-T reception; HDMI

Circuit Descriptions
EN 46 QM15.2E LA7.
2015-Sep-30
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7.4 Front-End Analogue and DVB-T/T2, DVB-C;
DVB S/S2, ISDB-T reception
7.4.1 Front-End Analogue and DVB T/C reception
The Front-End for analogue tuner consist of the following key
components:
• TUNER EUROPE TDSY-G480D
• TUNER EUROPE TDQS-A701F only for K series
• SCALER MT5593F/H/UPIJ HSBGA-900 Processor
Below find a block diagram of the front-end application for
analogue part.
Figure 7-4 Front-End Analogue block diagram
7.4.2 DTV T2 reception
The Front-End for DVT part consist of the following key
components:
• TUNER EUROPE TDSY-G480D
• SCALER MT5593F/H/UPIJ HSBGA-900 Processor
• DEMODULATOR Si2168-C50-GMR QFN-48 for T series
Below find a block diagram of the front-end application for DTV
part.
Figure 7-5 Front-End DVB-T2 DTV block diagram
7.4.3 Front-End DTV-S2 reception
The Front-End for ISTB part consist of the following key
components:
• TUNER EUROPE TDQS-A701F for K series
• SCALER MT5593F/H/UPIJ HSBGA-900 Processor
• DEMODULATOR Si2166-B22-GM QFN48 for K series
Below find a block diagram of the front-end application for DTV
part.
Figure 7-6 Front-End S2 DTV block diagram
7.5 HDMI
Refer to figure 7-7 HDMI input configuration for the application.
Figure 7-7 HDMI input configuration
The following HDMI connector can be used:
• HDMI 1: HDMI input ( TV digital interface support
HDMI1.4/HDCP1.3) with digital audio/PC DVI input/ARC
• HDMI 2: HDMI input ( TV digital interface support HDCP)
with digital audio/PC DVI input/ARC
• HDMI 3: HDMI input ( TV digital interface support
HDMI1.4/HDCP1.3) with digital audio/PC DVI input/ARC
• HDMI 4: HDMI input ( TV digital interface support
HDMI1.4/HDCP1.3) with digital audio/PC DVI input/ARC
• +5V detection mechanism
• Stable clock detection mechanism
• MHL 2.0 function only for HDMI4
• Audio return channel(ARC)
•HPD control
• CEC control
7.6 Video and Audio Processing - MT5593F/H/UPIJ
The MT5593F/H/UPIJ is the main audio and video processor
(or System-on-Chip) for this platform. It has the following
features:
• ATSC /DVB-T /DVB-C/DTMB demodulators
• Ture 120HZ Full HD MJC
• Power CPU core
• 3D graphic support OpenGL ES 1.1/2.0
• A muti-standard video decoder
• A transport de-multiplexer
• One HDMI 2.0 receiver with 3D support
• MHL2.0& Standby charging
• 2D/3D converter
• Rich format audio codec
• Local dimming (LED backlight)
IF
IF_AGC
RF_AGC
MT5593
IF_AGC
TDSY-G480D/TDQS-A701F
I
2
C
I
2
C
19880_203.eps
IF
IF-AGC
TS DATA
RF_AGC
MT5593
DECODER
Si2168-C50
Si2166-B22
IF_AGC
TDSY-G408D/TDQS-A701F
I
2
C
I
2
C
I
2
C
19880_204.eps
IF
IF-AGC
TS DATA
RF_AGC
MT5593
DECODER
Si2166-B22
IF_AGC
TDQS-A701F
I
2
C
I
2
C
I
2
C
19880_206.eps
19880_205.eps
MT5593
HDMI2
HDMI1
HDMI4
CN502
CN505
CN501
RX
RX
RX
MHL sense
I
2
C
I
2
C
I
2
C
HDMI3
CN502
RX
I
2
C