Philips 65PFL9708S/12 User Manual

IC Data Sheets
EN 47QFU1.2E LA 8.
2014-Jan-10
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8. IC Data Sheets
This chapter shows the internal block diagrams and pin
configurations of ICs that are drawn as “black boxes” in the
electrical diagrams (with the exception of “memory” and “logic”
ICs).
8.1 Diagram 10-1-8 B02C, DVBT2 channel decoder B02C, CXD2834 (IC7KC0)
Figure 8-1 Internal block diagram and pin configuration
19220_025_120227.eps
120227
Block diagram
Pinning information
TSIF
I
2
C IF
SCL
SDA
RFAIN
TTUSCL
TTUSDA
TAINP (IF)
TAINM (IF)
GPIO1 (PWM)
TIFAGC
XTALI
XTALO
41MHz or
20.5 MHz
IF+
IF-
(RFAGC-MON)
(RFAGC)
IFAGC
SCL
SDA
TUNER
MPEG
Decoder
TSCLK
TSVALID
TSSYNC
TSDATA7-0
TSCLK
TSVALID
TSSYNC
TSDATA7-0
SCL
SDA
DVB-T2
Demodulator
LDPC/BCH
Decoder
Stream
Processor
RS Decoder
TS
Smoothing
DVB-T
Demodulator
DVB-C
Demodulator
OSC
PLL
10-bit
ADC
12-bit
ADC
AGC
GPIO

Philips 65PFL9708S/12 Specifications

General

Screen Size	65 inches
Display Technology	LED
Smart TV	Yes
HDMI Ports	4
USB Ports	3
Audio Output	20 W
Ambilight	Yes
3D	Yes
Operating System	Android TV
Wi-Fi	Yes
Bluetooth	Yes
Resolution	3840 x 2160 (4K Ultra HD)
HDR	Yes