Philips 8000 Series - Page 126

EN 126Q551.1E LA 10.
Circuit Diagrams and PWB Layouts
2010-Jun-25
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div. table
PNX85500 Control
18770_904_100406.eps
100406
PNX85500 Control
B01E B01E
2010-02-01
2
8204 000 9081
TUNER, HDMI & CI
SCL
ADR
0
1
2 SDA
WC
D
C
S
W
HOLD
VSS
Q
VCC
B
C
D
8 9
7F52 B2
7F53 B7
7F54-1 C7
D
E
F
1F51 F8
LEVEL
7F58 D1
9CH0 C7
FF04 C4
3F60 E3
3F62 D5
1
SDA
USE ONLY
123 4
MAIN NVM
3F59 E3
FF63 E4
FF64 F7
FF65 F4
3F58 E1
IF50 B3
IF51 B1
IF52 B3
2 3 4
3F53 C6
3F54 D7
A
E
F
A
3F66 B7
8 9
IF59 E1
IF61 C4
IF62 C4
7F54-2 C7
B
C
2F52 B1
2F53 D6
2F58 D2
3F51 B1
3F52 B3
1F52 D8
FF57 E2
567
FF66 F4
567
3F63 E5
3F64 F5
3F65 F5
IF55 C6
3F67 B6
3F68 C7
3F69 D7
IF58 D2
DEBUG / RS232 INTERFACE
SCL
IF53 B3
IF54 C3
DEBUG ONLY
FF29 C4
FF55 E3
FF56 E3
SHIFTED
UP
FF58 C7
FF61 D4
FF62 D7
DEBUG
IF56 C7
IF57 C7
3F53
FOR
IF53
10K
10K
3F66
RES
+3V3-STANDBY
10K
3F67
RES
IF54
FF63
+3V3-STANDBY
FF56
3F63
100R
FF55
10K
3F52
FF29
3F59
100R
100R
3F65
IF58
IF62
IF59
3F60
100R
FF65
2
3
4
5
3F51
10K
1F52
1
IF52
+3V3
+3V3-STANDBY
+3V3
RES
2F58
100n
7F54-1
BC847BPN(COL)
2
6
1
7
FF66
RES
1
2
3
6
5
84
(8K × 8)
Φ
EEPROM
7F58
7F54-2
BC847BPN(COL)
5
3
4
7
RES
1
2
3
4
5
6
1F51
3F58
10K
9CH0
RES
IF51
IF57
RES
RES
1u0
2F53 3F54
1K0
100R
3F64
+5V
+3V3-STANDBY
1
84
3
FF61
FLASH
512K
Φ
6
5
7
2
7F52
M25P05-AVMN6
RES
47K
3F68
FF62
10K
IF61
3F69
RES
FF04
7F53 RES
PDTA114EU
3F62
100R
FF64
+3V3
FF57
RES
IF50
100n
2F52
IF56
IF55
+3V3
BOOST-PWM
BACKLIGHT-BOOST
SDM
SPI-PROG
RESET-STBYn
SPI-PROG
FF58
PNX-SPI-CLK
PNX-SPI-SDO
PNX-SPI-CSBn
PNX-SPI-SDI
PNX-SPI-WPn
SDA-UP-MIPS
SCL-UP-MIPS
SCL-SSB
SDA-SSB
TXD-UP
RXD-UP