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Philips AX7201 - Blockdiagram

Philips AX7201
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3-6 3-6
AN8399SA
HF-PREAMPLIFIER
RESET
MCLK
MLD
M DATA
BLKCK
S TAT
MCLK
EEPROM DATA
DISC
Laser
diode
PHOTO
DIODE ARRAY
A+C=PD1
B+D=PD2
TURNTABLE
MOTOR
TRACK
SERVO
FOCUS
SERVO
SLIDE
SERVO
B
A
E
F
KSM1000
CD-DRIVE
Monitor
diode
A/D-CONVERTER
INTERPOLATION
SUBCODE
SYNC
EFM-DEMODULATION
DIGITAL ATTENUATION
SOFT MUTING
DIGITAL FILTER
4 x OVERSAMPLING
TIMING
OFTR
1-BIT DAC
DIGITAL
INTERFACE
P TMP86PM29AU
LCD DRIVER
CLOCK GEN.
& TIMING
16bit TIMER
COUNTER
ALU
ROMRAM
4MHz
I/O PORTS
FOP
FOM
TRP
TRM
TRVP
TRVM
SPOUT
SPbrk
OUTR OUTL
TR±
SLD±
F±
T±
SL±
SPOUT, SPbrk
+A
BH6541KV
PWM DRIVE
FO±
PVCC
+2.6
VCC 7402
ADPVCC
(FROM PWM DRIVER)
U_OUT
V_OUT
W_OUT
FLEX
TREBLE
CHG_PWM
TEMP
DC_IN
MUTE
LF_POW
KEY1
KEY2
CHG_ON
CHG_DET
BAT_LEVEL
BEEP
DBB_ON
DBB_STEP
M_nRST
nPSM
(TO PSM CONT.)
GCTL
(TO HF-PREAMP.)
RESET
FROM/TO SUPPLY/
CHARGE CIRCUIT
FROM/TO
PWM-DRIVER
TO HEADPHONE AMP.
FROM/TO µP
FROM/TO µP
FROM/TO µP
DRAM
EEPROM
KEYBOARD
H-BRIDGE
MOTOR DRIVER 1
SPUIN
SPVIN
SPWIN
BRUSHLESS
MOTOR DRIVER
H-BRIDGE
MOTOR DRIVER 3
H-BRIDGE
MOTOR DRIVER 2
16.9MHz
VDD NRST7802
AVDD7403
+1.8V
+3.3V +µP
VCC 7801
+2.6V+2.6V
VCC
+2.6V
VCC 7800
+2.6V
VCC 7401
+2.6V
LASER
CONTROL
VCC7804 LDOFF
MUTE1
MUTE2
FPG
MON
A
RFOUT
FBAL
RFN
LD
MN662786SB
DIGITAL SERVO & CD-DECODER
VCC27306
HEADPHONE&
RC-SOCKET
1300
RCDATA
RCCLK
SUPPLY/CHARGE CIRCUIT
1201
DC-in socket
+
+
T700mA
DC/DC
CONVERTER
TEMP
+A
CHARGE
CIRCUIT
+3.0V
+2.6V
+3.3V
TEMP.
DETECT.
+A STAB.
CHG_PWM
CHG_ON
CHG_DET
BATT_LEVEL
DC_IN (TO µP)
MUTE1
MUTE2
EXTERNAL
BATTERY
RECHARG.
BATTERY
+
T700mA
MUTE
(FROM µP)
GCTL
(FROM µP)
VREF
FBAL
B
C
D
+
RFIN
HF-EQ
ARF
F
+
E
PD1
PD2
PD1
PD2
F
E
AREF
AREF
FG
INA
NRFDET
OFTR
nPSM
(FROM µP)
OFT
TEOUT TE
FEOUT
DET
FE
BDO BDO
3TOUT RFENV
TBAL
TBAL
ARF
AGC
NRFDET
B. GAP
3TENV
BDO
SERVO PROCESSING
OUTPUT PORTS
PWM-OUTPUTS
ADPVCC
(TO DIG. SERVO)
DE-INTERLEAVE
CIRC ERROR CORRECTION
INTERNAL
16K SDRAM
PSM
CONTROL
ANTI-SHOCK MEMORY
CONTROLLER
PRE-DRIVE
PRE-DRIVE
CHARGE
PUMP
PVCC/2
MONITOR
MUTE
PRE-DRIVE
PRE-DRIVE
DRIVER LOGIC
BOOST
A
1
2
B
BEEP
PWSW
MUTE
VREF
BST
AGC
TA2131FL
HEADPHONE AMP.
DSL
PLL / VCO
INPUT
INB
LPF1
TREBLE
BSTNF1
BSTSW
TREB.
CONT.
TREB.
CONT.
PWSW
+DRIVE
+DRIVE
(FROM PSM CONT.)
DBB_ON
BEEPIN
DBB
CONT.
AGCIN
BSTOUT
BSTNF2
LPF2
OUTA (LEFT)
OUTB (RIGHT)
BEEP
CONT.
DBB_STEP
LF_POW
BEEP
+A
VCC1
+2.6V
+2.6V
µP
INTERFACE
RCWAKEUP
RCCLK
RC-CIRCUIT
SLPSW
10kHz
10kHz
RCDATA2
C
D
eye-pattern signal
> 800 mVpp
TB=0.5µs
1
1
3V
0
moves outside
not moving
moves inside
2
2
3
3
BLOCKDIAGRAM

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