Philips PM 3266 - Page 108

113
If
V702
is
conducive,
the
signal
path
via
diode
V709
will
be
blocked.
The
signal'
path via
diode
V708
will
be
blocked
when
V703
is
conductive.
If
V702
or
V703
conducts
depends
on
the
setting
of
switch
S2.
There
is
no
voltage
applied
via
S2
to R716
and
R717
in
normal
horizontal
deflection
by
MTB
and/or
DTB
signals.
Transistor
V702
is
blocked,
V706
and
V703
conduct
and
the
signal
path
via
diode
V709
is
opened
In
EXT-X
DEFL
mode
a
+5
V
signal
is
applied
to R716
and
R717
and V702
is
conducting.
At the
same
time
V706
and
V704
are
blocked
and
the
signal
path via
diode
V708
is opened.
The
X-AMPL
potentiometer
R18
in
the
emitter
circuit
of V71
1 is
now
brought
into
the
circuitry.
3.2.2.2.
Main
time-base
trigger
amplifier
The
main
time-base
trigger
amplifier
consists
of
an
input
stage, coupling
filters
and
a final
amplifier.
In
this
trigger
amplifier,
there
is an
output
taken
off
for
trigger
view.
The
signal
current
from
the
intermediate
amplifier
(channel
A,
channel B,
or
composite)
is fed via
the
trigger
source
selector
circuit
to
the
emitter
of V803.
The
output
from
the trigger
source
(EXT,
EXT
10,
or LINE
i.e.
mains
frequency)
is also fed
to
the
emitter of
V803.
This
transistor,
connected
in
common-base
configuration,
is coupled
to the
shunt
feedback
stage
V804,
V806.
The
output
of this
stage
is
diode-coupled
to
the filters
for
the various
coupling
modes.
By
means
of
these
filters,
the
input
frequency
range
of the
trigger
circuit
can
be
set.
The
desired
filter
is
switched
in
by biasing
the
appropriate
switching
diodes in
the
forward
direction
via
two
resistors.
For
example
the DC
position,
selected
by switch
S20, is
switched in
by
the
-1
1
,4
V
which
causes
diodes V808
and V81
2 to conduct.
The
LF and HF
modes are
selected in
a
similar
way.
The
filter
section
is
coupled
to an
emitter-follower
V814,
which
compensates
for
the
temperature
drift of
transistor
V804.
On
the trigger
amplifier,
the
trigger view
signal
and the trigger
signal
proper
are split
up by
means of
integrated
circuit
D802.
The
two
input
transistors
(points
2, 3,
4
and points
5,
6,
7)
accept
the
trigger signal
and
the trigger
LEVEL
voltage
respectively.
Their
outputs
combine
to feed
a differential
amplifier.
The LEVEL
voltage
control
R7
perrrits
variation
of the
trigger
level of
the signal.
The
collector
current
from
the
trigger
signal and
trigger
level transistors
is fed
to the
combined
emitters of
the
differential
amplifier.
The
required
current
division
is obtained
by varying
the voltage
on the bases of
the
two
inner
transistors of
the
differential
amplifier
by means
of preset
potentiometer
R852
applied to
point
9.
The
collectors
connected
to
points
1
3
and 1
5
provide
the trigger
view
output.
The
collector
currents
on
points 1
4
and
1
2
are fed
to the shunt
feedback
stage V81
9
and V81
8
respectively,
thus
providing
the trigger
signal.
In the
negative
position of
the
-t/—
SLOPE
switch
S7, the
trigger signal
is taken
from
one of
the collectors
via
R824
and diode V823,
and in
the
positive position
via
V821 and
diode
V822.
-t-/-
SLOPE
switch
S7
determines
the polarity
of the
trigger
signal. In
the closed
position
a 0
V signal
causes
V823
to conduct
the
negative
trigger,
and also switches off
V828. In
the
open position,
V828
is switched
on
and
the
positive
trigger
is routed
via V822
and V823
is blocked.
In
this
way,
the
appropriate trigger
signal
is
supplied
to
the
time-base.
3.2.3. Main
time-base
generator
The
main
time-base
generator
comprises
a
sweep
gating
logic,
a
sweep
generator,
a hold-off circuit and
an
auto sweep
circuit.
MAIN TIML-BA5E
TRIGGER
SIGNAL
»
B
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TRiGG
SINGLE
’IME/DIV.
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VAR
MCLD-OPF
Fig.
3.8.
Main
time-base
generator
TO
CONTROL
LOGIC