Phytec i.MX 93 - Accessing Peripherals; I.MX 93 Pin Muxing

CHAPTER
SEVEN
ACCESSING PERIPHERALS
To nd out which boards and modules are supported by the release of PHYTEC’s phyCORE-i.MX 93 BSP
described herein, visit our BSP web page and click the corresponding BSP release in the download section.
Here you can nd all hardware supported in the columns “Hardware Article Number” and the correct machine
name in the corresponding cell under “Machine Name”.
To achieve maximum software reuse, the Linux kernel oers a sophisticated infrastructure that layers software
components into board-specic parts. The BSP tries to modularize the kit features as much as possible.
When a customized baseboard or even a customer-specic module is developed, most of the software support
can be re-used without error-prone copy-and-paste. The kernel code corresponding to the boards can be
found in device trees (DT) in the kernel repository under arch/arm64/boot/dts/freescale/*.dts.
In fact, software reuse is one of the most important features of the Linux kernel, especially of the ARM
implementation which always has to ght with an insane number of possibilities of the System-on-Chip
CPUs. The whole board-specic hardware is described in DTs and is not part of the kernel image itself. The
hardware description is in its own separate binary, called the Device Tree Blob (DTB) (section device tree).
Please read section PHYTEC i.MX 93 BSP Device Tree Concept to get an understanding of our i.MX 9
BSP device tree model.
The following sections provide an overview of the supported hardware components and their operating system
drivers on the i.MX 9 platform. Further changes can be ported upon customer request.
7.1 i.MX 93 Pin Muxing
The i.MX 93 SoC contains many peripheral interfaces. In order to reduce package size and lower overall
system cost while maintaining maximum functionality, many of the i.MX 93 terminals can multiplex up to
eight signal functions. Although there are many combinations of pin multiplexing that are possible, only a
certain number of sets, called IO sets, are valid due to timing limitations. These valid IO sets were carefully
chosen to provide many possible application scenarios for the user.
Please refer to our Hardware Manual or the NXP i.MX 93 Reference Manual for more information about
the specic pins and the muxing capabilities.
The IO set conguration, also called muxing, is done in the Device Tree. The driver pinctrl-single reads the
DT’s node fsl,pins, and does the appropriate pin muxing.
The following is an example of the pin muxing of the UART1 device in imx93-phyboard-segin.dts:
pinctrl_uart1: uart1grp {
fsl,pins = <
MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
MX93_PAD_UART1_TXD__LPUART1_TX 0x30e
>;
};
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