i.MX 93 BSP Manual PD24.1.1 Documentation Rev.: imx8mp-pd22.1.2-51-ga548be7d
General I²C1 bus conguration (e.g. imx93-phycore-som.dtsi): https://git.phytec.de/linux-imx/tree/arch/
arm64/boot/dts/freescale/imx93-phycore-som.dtsi?h=v6.1.55_2.2.0-phy3#n88
General I²C2 bus conguration for imx93-phyboard-segin.dts: https://git.phytec.de/linux-imx/tree/arch/
arm64/boot/dts/freescale/imx93-phyboard-segin.dts?h=v6.1.55_2.2.0-phy3#n155 or for imx93-phyboard-
nash.dts: https://git.phytec.de/linux-imx/tree/arch/arm64/boot/dts/freescale/imx93-phyboard-nash.dts?
h=v6.1.55_2.2.0-phy3#n113
7.9 EEPROM
There are two dierent I2C EEPROM ashes populated on phyCORE-i.MX93 SoM and on the phyBOARD-
Segin/Nash i.MX 93. For now only the one on the phyCORE-i.MX93 is enabled, and it is used for board
detection.
7.9.1 I2C EEPROM on phyCORE-i.MX93
The I2C EEPROM on the phyCORE-i.MX93 SoM has its memory divided into two parts.
• normal area (size: 4096 bytes, bus: I2C-2, addr: 0x50)
• ID page (size: 32 bytes, bus: I2C-2, addr: 0x58)
It is possible to read and write from the device populated:
target:~$ hexdump -C /sys/class/i2c-dev/i2c-2/device/2-0058/eeprom
To read and print the rst 1024 bytes of the EEPROM as a hex number, execute:
target:~$ dd if=/sys/class/i2c-dev/i2c-2/device/2-0050/eeprom bs=1 count=1024 | od -x
To ll the whole EEPROM (ID page) with zeros we rst need to disable the EEPROM write protection, use:
target:~$ gpioset 2 21=0
Then the EEPROM can be written to:
target:~$ dd if=/dev/zero of=/sys/class/i2c-dev/i2c-2/device/2-0058/eeprom bs=32 count=1
Warning
The rst 256 bytes of the normal EEPROM area (bus: I2C-2 addr: 0x50) are reserved and should not
be overwritten! (See below)
7.9.2 EEPROM SoM Detection
PHYTEC uses rst 256 bytes in EEPROM normal area to store information about the SoM. This includes
PCB revision and mounting options.
The EEPROM data is read at a really early stage during startup. It is used to select the correct RAM
conguration. This makes it possible to use the same bootloader image for dierent RAM sizes and choose
the correct DTS overlays automatically.
If the rst 265 bytes of the normal area are deleted, the bootloader will fall back to the phyCORE-i.MX93
Kit RAM setup, which is 1GiB RAM.
Accessing Peripherals 60