CLR
Cleat.
Accumulator A
or
B
or
a mamory location
is
Ioaded with
OOOOOOOO.
CMP
(8.tllt)
Compare
Memory Irom Regisler.
~
res
lhe
contents
of
melTlOl'y
location
la
the
conlents
of
the
fied register and sets the appropriale condition codes.
eilher the memory location nor the specified register
tS
modilled.
CMP
(16-bil)
Compare
Memory
Irom
Register.
Compares the
l6-bit
contents
of
the concatenated memory
locatIOns
10
the
conlents
of
the specifted
regisler
and
sets
the
appropriale condition codes.
Neither
the
memory
locations
nor
the specilied regîster is rnodilied unless autoincremenl or
aulOd8cfemeot
are
used.
COM
Complement.
Replaces
the contents
01
a memory kx:ation
Of
accumulator
A
Of
B wÎlh
ils
logical
complement.
When
operating
on
twos
complement values,
all
s1gned branches are available.
CWAJ
Clesr
CC
bits
and
Wait
lOf
InterNpl.
This Instruction
ANDs
an
Immediate
byte
with
the
condition code
register which rnay
cleer
the
interrupl
mask
bits 1
and
F,
slacks
the
entlra
machine
state
on
the
hardware
stack
and
then
looks
for an Interrupt.
DM
DecImal Addition Adjust.
The
sequence
of
a
single-byte
add
instruction
on
aCOJmulator A
and
IOftowing
decimal
addiUon
adjust
instruction
resulls
in
a BCD
addition with
an
appropriate cany bit.
DEC
0"'''"',,,,,,-
SUbtraets
one
tram
the
operand.
The
cany
bit
is not affected.,
thU$ allowing
lt1is
instruction
to
be
used
as
a Ioop counter
in
multiple-precision computations.
EOR
Exclusive
OR.
The
contents of a
memory
location is
exclusive
ORed
into an
a·bit
register.
EQD
Inltlallzes
data
or
addresses
and
sets
up
a
label.
EaU
commands
may
be Iocated
anywhere
in
the
program.
EXG
Exchange
Registers.
Exctlanges
data
betweeo
Iwo
designated
fegisters.
FCB
Form
Constant
Byte.
Inserts one byte of
data
atthis
point
in
!heprogram.
FCC
Form
Constant
Charaeter.
Writes
an
ASCII
strif'l!';l iota
memory,
using
thesynlaX:label FCC
de/imiterstringde/imIter.
INC
Increment.
Adds
tothe
operand. The
carry
bit is not affeeted,
thus
allowing
this
instruction to
be
used as a loop counter in multiple·precision
computations.
'MP
Jump.
Program
control
is
translerred
to
the
elfective
address.
>SR
Jumpto
Subroutine.
Pn:19ram
controlls
translerred
to
the
elfecüve addressafter
stonng
the
retum
address
on
the
stade
LD
(6-bit)
load
Register
frcm
Memory.
loads
the
contents
of
a
memory
location into the designated
register.
LD
(16·bit)
load
Reglster
from
Memory.
Loads
the
contents
of the
memmy
locations into the designated
16·bit
register.
UA
Load
Elfective
Address. •
Cak:ulates
the
effective
address
Irom
the inclexed addressing
mode
and
places
the
address
in
an inclexable register.
LSL
~
Shift
left.
Shifts all bits
of
accumulalof
A or B
or
a
memory
location
one
place
10
the
19ft.
Bit
zem
is
Ioaded
with
a zero.
Bit
sevan
of
ac:cumulator A
or
B
or
the
memory
Iocalion is
shifted
into the C
(carry) bit.
LSR
Logical Shift RighI.
Performs a lagicsl shift right on the
operand.
Shifls a
zero
into bit
seven
and
bit
zero
into
the
C (carry) bil.
MDL
Multiply.
Multiply
the
unsigned
binary
numbers
in
the
accumulators
and
place
the
result in
bath
accumulalors.
Unsigned
multiplyaltows
multiple..precision operations.
-----------""''t
,
42
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