Radio Shack Quick Printer II Technical Reference Manual

X
—
Index
Register
Y
-
Index
Register
U
-
User Stack Pointer
S
—
Hardware Stack Pointer
PC
D
t Pointer Registers
Program
Counter
Accumulators
DP Direct
Page Registor
[F
F
I
H
[
I N
Z
|
V
|
C
CC
-
Condition
Code Register
"Carry
-
Overflow
Zero
*
Negative
-IRQ
Mask
Half Carry
-
FIROMaak
. Entire Flag
FIGURE
3. PROGRAMMING
MODEL
OF
6809E CPU
Figure
4 shows
the typical
timing for
both
the read and write
cycle of
the 6809E
CPU.
This timing
is modified
by Color
Computer
hardware
during
any
access of
the dynamic
RAM.
The address from
the CPU
will be
provided
to the RAM only
while
the
E
clock
is
high.
This
presents
no problem
as
long
as
the RAM
is
sufficiently fast.
The 6809E
CPU
(U1) is a 40-pin
IC.
The Color Computer
uses
34
of
the
40
possible
signals. Of
the 34 signals,
the life
blood
of
the
computer
is the
address
and data
lines. It is
the duty of
the
address
lines
to select
one
address out
of
65,536 possible
locations.
After
the address
has been selected,
the data
lines
either input
data
to the
CPU or
output
data
to the selected
location.
The R/W*
line
(pin
32) is used
to determine
whether
a read
or write
operation
will
occur.
As
long
as
the
line
is high
the
CPU
is reading
data.
When
it goes low the
CPU is
writing
data.
In
order for
the 6809E
CPU
to function,
two clock inputs
must
be
provided,
E
and Q. These
clocks
are provided
by
U10,
an MC6883
dynamic
RAM
Controller
chip (SAM)
and are
50%
duty
cycle
clocks
at a frequency
of
0.89
MHz. As shown
in
Figure
4, Q
is a quadrature
clock signal
which leads
E
by 90
degrees.
The other
signals
generated
by
U1 and used by
the Color
Computer
are
the
Control/Interrupt
pins. The RESET*
(pin
37)
indicates
that
a power-up
or
RESET has
occured
and the
CPU
will
start
over by
executing
the program
addressed by
the
top two
bytes
of the
BASIC
ROM.
This
program is the Reset
Routine
that
configures
all of
the
programmable
hardware
in
the Color
Computer.
Three
interrupt
input
pins are also used.
IRQ*
and
FIRQ*
are
maskable
interrupts
which
are connected
to
the PIA's
and
are used for
multiple
interrupt inputs.
The
non-maskable
interrupt
(NMI*) is reserved
for Cartridge
usage.
All of
these
interrupt
inputs use
4.7K pull-up
resistors
(R4,
R5, and
R6).
The last
signal
of the
6809E CPU
used by the
Color Computer
is
HALT*
(pin
40).
This signal
also requires
a
pull-up
resistor
(R3-4.7K).
When
the HALT*
input
is pulled low,
the
address
bus, data
bus,
and
R/W* line are
all placed
in
the tri-state
condition.
This allows
an
external
device to
control
the
computer
via the
Cartridge
connector.
RESET
CIRCUIT
The reset
circuitry
is composed
of
R1, R2,
C1, C40,
CR1,
CR2, and
CR3.
This circuit
provides
two different
time
duration
pulses for
power-up
or reset.
R1
and C40
provide
a
pulse
of
approximately
10
milliseconds
which
is used to
reset
the
MC6883 memory
controller
chip
(U10). The reset input to
U10 is
also used
as an output,
so diode
CR2
is
used to isolate
the
output signal
on pin
7
from
the reset
circuitry.
The second
reset
pulse is
the master
system reset
signal.
This is
provided
to
the CPU
and both PIA's
(U4and
U8). C1 and R2
provide
this
master
reset
pulse of
approximately
0.1 sec.
CR1
is
used to
isolate the
two
RC circuits.
CR3 allows
a quick
discharge
of
C40 and
C1 for
rapid
multiple resets.
17

Radio Shack Quick Printer II Specifications

General

Brand	Radio Shack
Model	Quick Printer II
Category	Desktop
Language	English