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Spectra 70
RCA Spectra 70 Training Manual
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ELAPSED
TIME
CLOCK
The
least
significant
24
bits
of
Register
Zero,
the
first
General
Register,
may
serve
as
an
elapsed
time
clock.
The
70/25
power
supply
generates
a
(1)2
bit
every
16-2/3
milliseconds
(60
cycle
power).
This
bit
is
added
to
the
contents
of
Register
Zero.
When
register
overflow
develops,
an
interrupt
is
initiated
(see
page
11).
The
programmer
may
control
the
time
interval
between
these
interrupts
by
the
selec-
tion
of
the
value
stored
in
the
register.
A
(1)
2
is
added
to
the
low
order
bit
of
the
register
as
follows:
50
CYCLE
POWER
60
CYCLE
POWER
1
ADD
EVERY
20
MILLISECONDS
1
ADD
EVERY
16-2/3
MILLISECONDS
50
ADDS
EVERY
SECOND
60
ADDS
EVERY
SECOND
3000
ADDS
EVERY
MINUTE
3600
ADDS
EVERY
MINUTE
180000
ADDS
EVERY
HOUR
216000
ADDS
EVERY
HOUR
If
the
Timer
is
set
to
a
value
of
all
one
bits
(16,777,215>10'
the
first
add
causes
overflow.
If
the
Timer
contains
all
zeros,
overflow
will
take
place
approximately
93
hours
later,
using
50
cycle
power,
or
77
hours
later
using
60
cycle
power.
The
number
of
adds
required
to
clock
off
more
meaningful
time
intervals
are
indicated
below:
60
CYC
LE
POWER
16-2/3
MILLISECONDS
1
SECOND
30
SECONDS
1
MINUTE
30
MINUTES
1
HOUR
1
ADD
60
ADDS
1800
ADDS
3600
ADDS
108,000
ADDS
216,000
ADDS
13
The
overflow
value
of
the
24
bit
Timer
is
16,777,216
10
.
Let
us
assume
we
wish
to
generate
an
interrupt
every
minute.
By
subtracting
360010'
the
number
of
adds
executed
in
a
minute,
from
the
overflow
value,
we
can
determine
the
amount
to
be
stored
in
the
register.
16,777,216(10)
3,600(10)
16,773,616(10)
to
FFF1EF(16)
It
should
be
remembered
that
the
timer
contents
is
reduced
to
zero
at
the
point
of
overflow.
As
long
as
the
initial
value
is
added
to
the
register
contents
be-
fore
the
computer
returns
to
the
Processing
State,
no
time
loss
results.
Regi
ster
Zero
may
not
be
used
for
general
storage
purposes.
Even
though
interrupt
has
been
inhibited
(the
22
bit
of
reserved
HSM
location
48
is
(0)2),
the
addition
of
(1)
2
bits
to
the
register
contents
continues.
Exercise:
If
we
want
interrupt
after
5
minutes
and
30
seconds,
what
value
should
be
stored
in
register
zero?
18
20
Table of Contents
Table of Contents
4
General Description
7
High-Speed Memory
9
Introduction
9
HSM Addressing
9
Hexadecimal Numbering System
10
Exercise
11
Data and Instruction Format
12
Data Formats
12
Unpacked Format
12
Edited Format
12
Machine Instruction Format
13
Exercise
13
Interrupt
15
Introduction
15
Programming States
15
Processing State
15
Interrupt State
15
Types of Interrupt
15
I/O Interrupt
15
Operation Code Trap
16
Arithmetic Overflow and Divide Exception
16
Elapsed Timer Interrupt
17
Inhibiting Interrupt
17
Exercise
17
Summary of Interrupt Logic
18
Elapsed Time Clock
19
Introduction to the RCA 70/25 Assembly Language
20
Format Requirements
20
Addressing
20
Self-Defining Values
22
Expressions
22
Implied Lengths
23
Assembler Controlling Codes
23
Define Storage (DS)
24
Origin Code (ORG)
24
Constant Definition (DC)
24
Program Linking Codes (ENTRY and EXTRH)
25
Run and Segment Controlling Codes (START, END, CSECT)
26
Equate Code (EQU)
27
Base Register Controlling Codes (USING, DROP)
27
Extended Mnemonic Instructions
27
Exercise
28
Instruction Complement
30
Data Movement Instructions
30
Move Character (MVC)
30
Exercises
31
Packing and Unpacking Data (PACK and UNPK)
32
Exercises
33
Decimal Arithmetic Instructions
35
Decimal Add (AP) and Subtract (SP)
35
Decimal Multiply (MP)
36
Decimal Divide (DP)
37
Exercises
37
Data Editing Instruction (ED)
39
Examples
40
Exercises
41
Comparison and Branching Instructions
43
Compare Logical (C LC)
43
Compare Decimal (CP)
43
Branch on Condition (BC)
44
Branch and Link (BAL)
44
Branch on Count (BCT)
45
Set P2 Register (STP2)
45
Exercises
45
Load and Store Instructions
47
Load Multiple (LM)
47
Store Multiple (STM)
47
Binary Arithmetic Instructions
48
Binary Add (AB) and Subtract (SB)
48
Exercise
48
Logical Instructions
51
Logical and (NC)
51
Logical or (OC)
51
Exclusive or (XC)
51
Use of Logicals
52
Test under Mask Instruction (TM)
53
Data Translation, Translate (TR)
53
Inputloutput
55
Introduction
55
Read Instructions (RDF) and (RDR)
55
Writing Data (WR) and (WRE)
56
Controlling Peripheral Devices
56
Error Recognition
57
Logic
59
Standard Device Byte
59
Sensing Exceptional Conditions
59
Peripheral Unit Sense Bytes
60
Summary of 1/0 Logic
61
Example of 110 Coding
62
Exercise
63
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RCA Spectra 70 Specifications
General
Manufacturer
RCA
Model
Spectra 70
Category
Computer Hardware
Word Size
32 bits
Memory
Up to 512 KB
Predecessor
RCA 3301
Successor
RCA Series
Related product manuals
RCA 70/46
260 pages