Roland JUNO-106 - Module Board; Parts Designation and Pinouts; Oscillator and D;A Converter Circuits

MODULE BOARD
Slave CPU uPD7810/7811
DESIGNATION
AN
(ANALOG
INPUT)
>
=z
(=)
as] >
MOOR WN HH OFF OT ERWH RH TIN OOPRWH =
2
3
4
5
6
7
0
9g iw)
NO OP WH | ODOR WR
FUNCTION
TUNE
PORTAMENTO
LFO TRIGGER SWITCH
LFO SENSE (DEPTH)
BENDER VCF SENSE
BENDER VCO SENSE
BENDER POLARITY
BENDER CV
S/H DEMULTIPLEXER CHANNEL
_|sevect
NOT USED
S/H DEMULTIPLE
XER CHIP SELECT
NOT USED
D/A CONVERTER DATA OUT
(UPPER 6 BITS)
| NOT USED
NOT USED
SERIAL DATA RECEIVE LINE
(FROM CPU BOARD)
D/A CONVERTER DATA OUT
(LOWER 6 BITS)
ADDRESS
DATA OUT
LSB 8 BITS
ADDRESS MSB6 BITS
7 RANGE SELECT
‘| 12MHz CLOCK INPUT
RESET PULSE INPUT
ROM READ TIMING PULSE
8253 LATCH WRITE TIMING PULSE
ADDRESS LATCH TIMING PULSE
---- 1: EXTERNAL ROM,
----0: INTERNAL ROM
-++-0: EXTERNAL ROM,
---+ dT: INTERNAL ROM
JUNO-106
ieee tient en emanated
fT Tt ree
JUL. 31, 1984
IC 4,8,12 HPF
MC55134
CHORUS
JACK BOARD
OSC, DCO
OSC
The oscillator consists of a master oscillator (8MHz) and a divider IC35. The
{C35 divides 8MHz by two, four or eight according to a position of RANGE
(4', 8’, 16’) on the panel and feeds it to DCOs IC33 and 1C34 which are
16-bit Programmable Interval Timers.
DCO
Each of three counters in one Timer divides OSC frequency by a number de-
fined by a divide data represented on the data bus of the slave CPU IC29. The
divide data is the sum of a key number and the outputs from LFO, Bender,
Portamento and Tune for a particular note. The resultant at the output of
each counter will be a rectangular of audio frequency.
D/A CONVERTER
In controlling voices the slave CPU does not output each parameter indepen-
dently, rather, it integrates some of parameters that are needed for a parti-
cular destination (DCO, VCF or VCA) and represents them as a 12-bit data
(upper 6 bits at PBO—PB5 and lower 6 bits at PC2—-PC7). The data is con-
verted into an analog voltage which is conditioned and routed to the destina-
tion module from the demultiplexer (I1C23, 24 or 26) as shown below.
D/A & S/H TIMING CHART a
D/A OUT
To observe D/A Output, IC28b
trigger scope on TP-6 (§C40 pin 9). 082
(TP4)
Buffer a 5 ov
Pp 16:30,31,22 TP:
ri 405033 Rée network IC27a 'y
TEIN 5
n|
0
VCF CV
IC27b 78?
VCA CV
RES.CV ——» IC26
NOISE
LEVEL
4051
INH
{0
to
+10V)
a
>
Lod
—
per
2
(eo)
bea
Note that the select code and INH for 1026 are level shifted at IC25 output.
This is because that [C26 operates from + 15V.
RESONANCE
VCA LEVEL
eS 0CO CV
SUB LEVEL —*» |C24
{0 to -10V) 4051 INH | | | | |
IC28a
> —» iC23
VCA
LEVEL
4051
INH
|
|
|
|
|
|
|
|
|
|
|
|
|
|
(+4 to -6v) PWM CV
SUB OSC LEVEL
me INT MI! tl oleo TETANY NO [OO bet ct lin jin] © Jeo [os
pa
3/8 a
> >
B B13 |S ra
9 Sepyolnftpultpupati upc] wf ae ie
(3) GIYVIOLOPOJSOLOLO;/OLOFL OF alo
a EIS|S|S{S|S{S{S]S]S]S] &jVis