Samsung PL55 - 8-6 Main PCB-6

Schematic Diagrams
8-6 This Document can not be used without Samsung's authorization SAMSUNG
CFG2
0 0
1 0
1
CFG1
0
0
(B)CFG Pins CFG5
B
0
CFG3
16/32M NAND
0 00
1
PWM Signal
CFG0: "H"= Slow, "L" =Fast
1
CFG4
1
USB Boot
CONFIGURE STATUS TV_DETECT USBIO
USB DOWNLOAD L H
NAND BOOT Open H/L AV MODE L L
64/128M NAND
C
E
0
DEL R36
SPKRP and SPKRN
180
2*pi*
1
Fc : Cut-Off Frequency
Fc =
2*L1*C75
MIC_N_1
MIC_P_1
USBIO
TV_DETECT2
VBUS2,10
NAND_D6-CFG4 2,5
MIC_N 2
LCD_D4-CFG10 3,11
MIC_P 2
LCD_D3-CFG9 3,11
TV_IN_DETECT10
LCD_D1-CFG7 3,11
NAND_D7-CFG5 2,5
LCD_D2-CFG8 3,11
NAND_D5-CFG3 2,5
NAND_D4-CFG2 2,5
NAND_D2-CFG0 2,5
NAND_D3-CFG1 2,5
SPKRP 2
SPKRN 2
LCD_D0-CFG6 3,11
ASIC_3V3
ASIC_3V3
ASIC_3V3
R41 33K
R121 NC
R32 5K6
C150
C0805
4.7uF/10V Y5V
R43
1K
R33 1K1
LS1 SPEAKER DS-158 0.5W 70MM (CHUENWAY)
J100/2SMT
3
2
1
Q3 UNR31A4G0L
B
E C
R122 NC
RN3 33K
1
34
56
78
2
R42 10K
L2 GLF2012T100K(TDK)
L0805
R135 33K
R40 33K
RN4 33K
1
3
4
56
78
2
Q5 UNR32A4G0L
B
E C
MIC1
MIC EM-64BAN 60mm PARALLEL (IMPERIAL)
J100/2SMT
1
2
L1 GLF2012T100K(TDK)
L0805
R123 33K
C58
0.047uF/16V Y5V
C0402S
R38 10K
R39 33K
R34 1K1
R44 10K
Q4 UNR32A4G0L
B
E C
C57
0.047uF/16V Y5V C0402S
C56 4.7uF/10V Y5V
C0805
C149
C0805
4.7uF/10V Y5V
8-6 Main PCB-6