Samsung
Confidential
CLK.
LVDS I/F
4 OF 5
SVID
DACCRT
EXCEPT AS AUTHORIZED BY SAMSUNG.
SAMSUNG ELECTRONICS CO’S PROPERTY.
1
SAMSUNG PROPRIETARY
Select configuration of the integrated graphics engine.
D
0 : DDR3. On DDR3, it is necessary to put an isolation FET in series with the pull-up
A
0 : Select Memory Channel A to be a debug bus
DESCRIPTION
PROPRIETARY INFORMATION THAT IS
B
A
4
4
1
1
1 : Disable integrated graphics
THIS DOCUMENT CONTAINS CONFIDENTIAL
DACVSYNC
4
2
0 : Reserved
2
C
B
C
B
decoupling CAPS on the bottom side close to BALLS
Debug strap configuration. This strap should not be set to "0" on production boards.
A
STRAP DEFINITIONS FOR THE RS600M
DDC_DATA
EXCEPT AS AUTHORIZED BY SAMSUNG.
0 : Enable integrated graphics
Enable/Disable integrated graphics.
P3.3V_NB CONTROL CIRCUIT
3
ELECTRONICS
STRAP PIN
D
A
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
1 : DDR2
C
STRP_DATA
THIS DOCUMENT CONTAINS CONFIDENTIAL
D
2
SAMSUNG ELECTRONICS CO’S PROPERTY.
4
C
2
SAMSUNG PROPRIETARY
Select DDR2 or DDR3 signalling level for the memory interface.
3
DACHSYNC
1 : Required setting for the RS600M
SAMSUNG
D
PROPRIETARY INFORMATION THAT IS
CLOSE TO CRT CONN
3
1 : Read debug straps from an external EEPROM, or disable debug mode when an EEPROM is absent.
DO NOT DISCLOSE TO OR DUPLICATE FOR OTHERS
resistor on this strap to separate it from the I2C circuit during an NB reset
1
B
Put the AVDD,AVDDI,AVDDQ,PLVDD
3
7-C1
R90
150
nostuff
10V
C598
2200nF
C82
10V
25-C3
1%
2200nF
25-C4
25-C3
6.3V
C600
4700nF
10V
C73
2200nF
P3.3V_NB
R573
0
26-D4
R88
150
nostuff
R572
33
2200nF
C72
10V
1%
25-C3
B15
BLM18PG181SN1
26-C4
R79
4.7K
P3.3V_NB
P3.3V_NB
7-B1
B14
BLM18PG181SN1
4700nF
C76
6.3V
1%
nostuff
P1.8V
150
R89
10V
C80
2200nF
R85
4.7K
C79
0.1nF
10V
C83
100nF
P1.2V
PLLVDD18
nostuff
16V
C597
470nF
1
3
2
AVDDQ
25-D4
25-C4
nostuff
Q515
MMBT3904
nostuff
6.3V
C74
4700nF
R83
0
25-C4
C78
10V
25-C3
100nF
P1.8VP3.3V_NB
BLM18PG181SN1
B21
4.7K
R111
26-B2
B13
BLM18PG181SN1
P1.8V
100nF
C117
10V
4.7K
R84
C81
0.1nF
P3.3V_NB
R81
4.7K
10V
2200nF
C77
2200nF
C599
10V
nostuff
6.3V
C115
4700nF
Q517
D
3
1
G
2
S
nostuff
R571
0
B508
BLM18PG181SN1
nostuff
SI2315BDS-T1
nostuff
R579
30K
BLM18PG181SN1
B16
P3.3V
26-A2
2200nF
C84
10V
R78
4.7K
26-A3
10V
2200nF
C116
R570
10K
7-C1
VSSLT_1
A26
VSSLT_2
C29
VSSLT_3
F24
VSSLT_4
V12
VSSPLL_PCIE_1
T12
VSSPLL_PCIE_2
T13
VSSPLL_PCIE_3
F18
Y
nostuff
F23
TXOUTU3P_RESERVED
H24
VDDLT18_1
J24
VDDLT18_2
J23
VDDLT33_1
H23
VDDLT33_2
M10
VDDPLL_PCIE_1
P13
VDDPLL_PCIE_2
P12
VDDPLL_PCIE_3
A18
VDDR3_1
B18
VDDR3_2
A30
TXOUTL2N_RESERVED
A29
TXOUTL2P_RESERVED
C28
TXOUTL3N_RESERVED
C27
TXOUTL3P_RESERVED
C24
TXOUTU0N_RESERVED
C25
TXOUTU0P_RESERVED
D24
TXOUTU1N_RESERVED
E24
TXOUTU1P_RESERVED
H21
TXOUTU2N_RESERVED
J21
TXOUTU2P_RESERVED
E23
TXOUTU3N_RESERVED
SMB_DATA
B14
STRAP_DATA
B26
TMDS_HPD
A27
TXCLKLN_RESERVED
B27
TXCLKLP_RESERVED
E21
TXCLKUN_RESERVED
F21
TXCLKUP_RESERVED
B28
TXOUTL0N_RESERVED
A28
TXOUTL0P_RESERVED
C30
TXOUTL1N_RESERVED
B30
TXOUTL1P_RESERVED
B29
C5
GPIO4_LVDSENABL
F19
GREEN
B21
LTPVDD18
A21
LTPVSS18
B11
OSCIN
A12
PLLVDD12
A14
PLLVDD18
A11
PLLVSS
D19
RED
C21
SMB_CLK
B22
COMP_PB
B7
CPU_CLKN
A7
CPU_CLKP
J18
C_PR
B24
DACHSYNC
B23
DACVSYNC
A25
DAC_RSET
A22
DAC_SDA
B12
DDC_DATA
C4
GPIO2_LVDSBLON
D3
GPIO3_LVDSDIGON
U506-4
RS600ME
B19
AVDDDI
A23
AVDDQ
A17
AVDD_1
B17
AVDD_2
A19
AVSSDI
M23
AVSSN_1
N23
AVSSN_2
A24
AVSSQ
J19
BLUE
D18
P1.8V
P1.8V
25-C4
0
R80
BAV99LT1
D512
nostuff
1
3
2
1%
R87
681
25-C4
P1.8V
26-B3
26-D4
P3.3V_NB
P5.0V_ALW
25-D2 25-B4
25-B4
nostuff
Q516
RHU002N06
3
D
G
1
S
2
25-C4
10V
2200nF
C86
LCD1_ADATA0
LCD1_ADATA0#
CRT3_DDCDATA
LCD3_VDDEN
LCD3_BKLTEN
VGA3_VSYNC
VGA3_HSYNC
LCD3_EDID_CLK
LCD3_EDID_DATA
CRT3_DDCCLK
LCD1_ACLK
LCD3_BKLTCTRL
CLK0_HCLK1
LCD1_ACLK#
CRT3_BLUE
CRT3_GREEN
CRT3_RED
CLK3_NB14M
CLK0_HCLK1#
LCD1_ADATA2
LCD1_ADATA2#
LCD1_ADATA1
LCD1_ADATA1#