Samsung RCD-750 - KS9282 (NIC9282) DSP IC Pin Description

e DSP (KS9282) (NIC 9282)
Pin No. Symbol oO Description
1 AVDD1 Aanlog Vcc 1
2 DPDO O Charge pump output for master PLL
3 DPFIN I Filter input for master PLL
4 DPFOUT O Filter output for master PLL
5 CNTVOL | VCO control voltage for master PLL
6 AVSS1 Analog Ground 1
7 DATX oO Digital audio output
8 XIN l X-tal oscillator input
9 XOUT oO X-tal oscillator output
10 WDCH O Word clock of 48 bit / SLOT
(Normal speed = 88.2 KHz, Double speed = 176.4KHz)
11 LRCH O Channel clock of 48 bit / SLOT
(Normal speed = 44.1KHz, Double = 88.2KHz)
12 ADATA O Serial audio data output of 48 bit / SLOT (MSB first)
13 DVSS 1 Digital Ground 1
14 BCK O Audio data Bit clock for 48 bit / SLOT
(Normal speed = 2.1168KHz, Double speed = 4.2336(KHz)
15 C2PO oO C2 pinter for output audio data
16 VREFL2 I Input terminal 2 of reference voltage "L" (Floating)
17 VREFL1 | Input terminal 1 of reference voltage “L" (GND Connection)
18 AVDD2 Analog VCC2
19 RCHOUT oO Right-Channel audio output through D/A Converter
20 LCHOUT O Left-channel audio output through D/A converter
21 AVSS2 Analog Ground 2
22 VREFH 1 | Input terminal 1 of reference voltage "H" (VDD connection)
23 VREFH 2 I Input terminal 2 of reference voltage "H" (Floating)
24 EMPH O Emphasis / Non - Emphasis Output ("H":Emphasis)
25 LKFS O The Lock Status output of frame sync\
26 SOS 1 0 Output of subcode sync signal (S 0+ S$ 1)
27 RESET I System reset at "L"
28 SQEN | SQCK I/O Control ("L" : internal CK, "H" : external CK)
29 SQCK /O Clock for output Subcode-Q data
30 SQDT O Serial output of Subcode-Q data
31 SQOK O The CRC check result signal output of subcode-O
32 SBCK I CLOCK for output subcode-Q data
33 SDAT O Subcode serial data output
34 DVopp 1 Digital Vcc 1
35 MUTE I Mute control Input ("H" : Mute ON)
36 MLT I Latch Signal Input from Micom
37 MDAT | Serial data Input from Micom
38 MCK | Serial Clock input from Micom
39 DB 8 /O SRAM data I/O Port 8 (MSB)
40 DB7 /O SRAM data I/O Port 7
41 DB6 /O SRAM data I/O Port 6
RCD-750
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