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Sharp CD-C440W - Page 47

Sharp CD-C440W
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– 47 –
CD-C440W/CP-C440W
IC601 RH-iX0171AWZZ:System Microcomputer (IX0171AW) (2/2)
52 VDD Positive power supply
53 CD O/C SW Input CD open-close switch input
54 DISC No. SW Input CD turntable position detection input
55 CD U/D SW Input CD mechanism UP/DOWN chucking detection input
56 T1 CrO SW Input Tape 1 CrO2 detection SW input
57 SRS INH Output SRS (surround) position selection output
58 SRS B Output SRS (surround) position selection output
59 SRS A Output SRS (surround) position selection output
60 SRS 3D Output SRS (surround) position selection output
61 SRS PASS Output SRS (surround) position selection output
62 SPAN 9K/10K Input Tuner span selector 9 kHz/10 kHz selection input
63 DOLBY Input DOLBY detection input, not applied in this machine
64 SRS Input SRS detection input, not applied in this machine
65 BALANCE Input BALANCE detection input, not applied in this machine
66 4SP Input 4SP detection input, not applied in this machine
67 TAPE A-FP SW Input Tape A side miserase preventing SW input
68 TAPE B-FP SW Input Tape B side miserase preventing SW input
69 TAPE PB MUT Output Tape playback mute output
70 TAPE T1/T2 Output Tape 1/2 selection
71 VLOAD To be connected to GND
72 TAPE BIAS Output Tape bias circuit selection
73* ———— Not used
74* ———— Not used
75 TAPE BEET CUT Output Beat cancel signal control output
76 TAPE HI SPEED Output Tape mechanism High-Low speed selection
77* ———— Not used
78* ———— Not used
79* TAPE PB EQ Output Tape circuit playback Eq selection
80 TAPE REC MUT Output Tape circuit record muting output
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
Terminal Name
Pin No. Input/Output
Function
1
REC/PB
CD MUTE
CD RES
SL-
SL+
CQ CK
COIN
SQ OUT
WRQ
RWC
P94
CD/TAPE CONTROL
µPD 78045A
P93
P92
P91
P90
P81
P80
Vdd
SCK 0
SO 0
Si 0
P24
P23
SCK 1
SO 1
Si 1
RESET
P74
P73
AVss
ANi 7
ANi 6
ANi 5
ANi 4
SRS
DOLBY
SPAN 9K
SRS PASS
SRS 3D
SRS A
SRS B
SRS iNH
T1 Cro2
CD U/D SW
DISC No. SW
CD O/C SW
TA MOTOR
TA SOL
F/R SPEED
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
PU-IN SW
MAIN
µ COM
DRF
T1 RUN
T2 RUN
SPE 5
17
18
19
20
21
22
23
24
REC MUT
PB EQ
Hi SPEED
BEET CUT
BiAS
T1/T2
PB MUT
T2 BFP
T2 AFP
4SP
BALANCE
ANi 3
ANi 2
ANi 1
ANi 0
AVdd
AVref
P04
Vss
X1
X2
P37
P36
P35
P34
P33
403938
3736353433323130
29
28
272625
65
666768697071727374
75
7677
787980
P95
P96
P97
P100
P101
P102
P103
P104
P105
V Load
P106
P107
P110
P111
P112
P113
SPE 4
SPE 3
SPE 2
SPE 1
TACUM SW
LINE MUT
SUR MUT
CEN MUT
SYS MUT
MIC
T2CrO
RELAY
POWER
SP DET
CLK
DATA
DOLBY
PRO
EN
48
47
46
45
44
43
42
41
P114
P115
P116
P117
P120
P121
P122
P123
P124
P125
P126
P127
Vdd
P70
P71
P72
iC
INT 0
INT 1
INT 2
INT 3
P30
P31
P32
Figure 47 BLOCK DIAGRAM OF IC
*
*

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