Sharp LC-37X20E - Page 101

LC-32X20E/S/RU, LC-37X20E/S/RU
5 – 29
T33 MAA2 O Memory Address line of Port A or SCAN data output.
T30 MAA3 O Memory Address line of Port A or SCAN data output.
R32 MAA4 O Memory Address line of Port A or SCAN data output.
R30 MAA5 O Memory Address line of Port A or SCAN data output.
R33 MAA6 O Memory Address line of Port A or SCAN data output.
R29 MAA7 O Memory Address line of Port A or SCAN data output.
P34 MAA11 O Memory Address line of Port A or SCAN data output.
P33 MAA8 O Memory Address line of Port A or SCAN data output.
P30 MAA9 O Memory Address line of Port A or SCAN data output.
N29 MD32 I/O Memory data bus.
N30 MD33 I/O Memory data bus.
M30 MD34 I/O Memory data bus.
M31 MD35 I/O Memory data bus.
L33 DQM4 O Memory data write mask enable for byte 4.
L32 DQS4 I/O Data strobe for memory data bus MD[39:32].
K32 DQS4N I/O Data strobe for memory data bus MD[39:32].
J30 MD36 I/O Memory data bus.
J31 MD37 I/O Memory data bus.
H29 MD38 I/O Memory data bus.
H30 MD39 I/O Memory data bus.
N32 MD40 I/O Memory data bus.
N33 MD41 I/O Memory data bus.
M33 MD42 I/O Memory data bus.
M34 MD43 I/O Memory data bus.
L34 DQM5 O Memory data write mask enable for byte 5.
K33 DQS5 I/O Data strobe for memory data bus MD[47:40].
K34 DQS5N I/O Data strobe for memory data bus MD[47:40].
J33 MD44 I/O Memory data bus.
J34 MD45 I/O Memory data bus.
H32 MD46 I/O Memory data bus.
H33 MD47 I/O Memory data bus.
G33 MCLK1 O Memory clock for MD[63:32].
G34 MCLK1N O Memory clock for MD[63:32] - active LOW.
F29 MD48 I/O Memory data bus.
F30 MD49 I/O Memory data bus.
E30 MD50 I/O Memory data bus.
E31 MD51 I/O Memory data bus.
D33 DQM6 O Memory data write mask enable for byte 6.
D32 DQS6 I/O Data strobe for memory data bus MD[55:48].
C32 DQS6N I/O Data strobe for memory data bus MD[55:48].
B30 MD52 I/O Memory data bus.
B31 MD53 I/O Memory data bus.
A29 MD54 I/O Memory data bus.
A30 MD55 I/O Memory data bus.
F32 MD56 I/O Memory data bus.
F33 MD57 I/O Memory data bus.
E33 MD58 I/O Memory data bus.
E34 MD59 I/O Memory data bus.
D34 DQM7 O Memory data write mask enable for byte 7.
C33 DQS7 I/O Data strobe for memory data bus MD[63:56].
C34 DQS7N I/O Data strobe for memory data bus MD[63:56].
B33 MD60 I/O Memory data bus.
B34 MD61 I/O Memory data bus.
A32 MD62 I/O Memory data bus.
A33 MD63 I/O Memory data bus.
CPU Interface
B26 MASTSEL I Lexra bus master select, H:I2C, L:1x5180.
Interrupt Interface
T1 INT1 I External interrupt, low active Edge or level.
I2C Interface
W5 SCLMAST2 I/O I2C master 2 clock.
Y5 SDAMAST2 I/O I2C master 2 data.
AE5 SCLMAST1 I/O I2C master 1 clock.
AF5 SDAMAST1 I/O I2C master 1 data.
Ref No. Pin Name I/O Pin Function