Sharp LC-42XL2S - Page 129

LC-42XL2E/S/RU, LC-46XL2E/S/RU, LC-46X20E/S/RU, LC-52XL2E/S/RU, LC-52X20E/S/RU
5 – 9
2.5. IC1402 (VHiR2S15502-1Y)
2.5.1 Pin Connections and short description
15, 16, 17 OUTPR O Digital amplifier output terminal (Rch+)
18, 19 PVSSR — Ground terminal for digital amplifier output (Rch)
20, 21, 22 OUTMR O Digital amplifier output terminal (Rch-)
23, 24 PVDDMR — Power terminal for digital amplifier output (Rch-)
26 SLEEPN I Sleep control terminal
27 PROTN O Error flag output terminal
28 MUTEN I Mute control terminal
29 CKOUT O Clock output terminal for synchronization
30 CKIN I External clock input terminal
31 NCDRC0 I Non-clip/DRC1/DRC2 mode selection terminal 0
32 NCDRC1 I Non-clip/DRC1/DRC2 mode selection terminal 1
33 GAIN0 I GAIN setting terminal 0
34 GAIN1 I GAIN setting terminal 1
37, 38 PVDDML — Power terminal for digital amplifier output (Lch-)
39, 40, 41 OUTML O Digital amplifier output terminal (Lch-)
42, 43 PVSSL — Ground terminal for digital amplifier output (Lch)
44, 45, 46 OUTPL O Digital amplifier output terminal (Lch+)
47, 48 PVDDPL — Power terminal for digital amplifier output (Lch+)
Pin No. Pin Name I/O Pin Function
1 AVSS — 0V Power Supply for Analog Core
2 AVDD — 3.3V Power Supply for Analog Core
3 SIF I Sound IF Input
4 VREF1 — ADC Voltage Reference 1
5 VREF2 — ADC Voltage Reference 2
6 TEST I Test pin
7 XI I Crystal Oscillator Input
8 XO O Crystal Oscillator Output
9 IVDD — 3.3V Power Supply for I/O Buffer
10 IVSS — 0V Power Supply for I/O Buffer
11 DVSS — 0V Power Supply for Logic Core
12 DVDD — 1.5V Power Supply for Logic Core
13 DACCLK I/O DAC Clock
14 BCK I/O Bit Clock
15 LRCK I/O LR Clock
16 SD0 O Digital Output for External DAC
17 SDI I Digital Input for Internal DAC
18 SDA I/O I2C bus Serial Data
19 SCL I I2C bus Serial Clock
20 STATUS I/O PLL Setting / Status Signal
21 RESET I Hardware Reset (Active low)
22 ROUT O Rch Analog Output
23 VCOM — DAC Voltage Reference
24 LOUT O Lch Analog Output
Pin No. Pin Name I/O Pin Function