Sharp PC-1500 - Page 14

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1/0 port {LH5810 )
Pin Signal
In/out Connection
Functional de
scri ption
N
o.
N ame
29 RSO
In
CPU
Internal register and operation se lect signal
? ?
? i
~
32 RS3
In
CPU
Internal register and operation se lect signal
33
R/W
In CPU
Read/write input
34 ME O
In
CPU
Memory enable and 1/ 0 port controller enable
35 MEI In CPU
Memory ena b le
36
WO In Option
Wait condition inp ut
37
WI
In
Option Wait co ndition in put
38
GND In Power
OV
39
V CC In Power + SV
40 DM EO Ou t
RO M, option R OM e na ble
41 DM EI Out Decoder ROM enable
42
WA IT
Out
C
PU Wait $i gn al to the CPU
43 IN T Ou t CPU
Interrupt re q uest to the CPU
44 RE SF.T In
RESE T Ini ti al rest signal
circuit
45
IRQ
In
Option Interrupt re qu est i np ut
46
</>OS
In CPU B asic clock in pu t
47 CLI CLO
Not used. Serial da ta r ece ption clock input
48 SDI
(VCC) No t used. Serial data reception input
49 LC NC
Not used. LC D d ri ver synchronizing signal
50 CLO lo CLl
Serial data transmission/reception clock
51
SDO
In CMT
Serial transmission/reception data.
cassette tape data output.
Use for the
52 DO In/out
CPU Data bus
>
?
?
?
?
59
D7
In/out
CPU Data bus
60 PAO Out
Key P or t A input/output. Used as the key strobe.
12
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