Set hour (HH), minute (MM).
and
second (SS)
in
each
two
digits
in
the 24-hour system.
For example, when specifying
7:9:9
pm,
enter
"190909".
If
time
is
improperly specified (such as
19:60:51).
the
system cancels such data
entry
and
inquires data
entry
once
again.
(a.3) Confirmation
of
Date and Time Set
Set
ok?
[0: Yes, 1: Nol =
I!
Confirm whether
to
execute
the
setting of data and time
or
not. When
the
system completes
the
setting
of
date and
time,
it
also set
the
digits
of
second.
When entering
[[1]].
the
test
can be conducted from
(a.l)
"Date Set
(1)"
mentioned
in
(a.l).
On
the other hand when entering
[[oll
,
the
system registers
date and
time
data being set and displays date and
time
being set Iset
time)
and
current
date
and
time
(read time),
--
--
- - - - - - - - - - - - - - - - - - -
---
Set time: SEP·09·1985
Read time: SEP·09·1985
19:09:09
19:09:38
The program
automatically
converts
the
month
display
format
from numeric digits
to
alphabet
characters.
Note
that
the system display
"JAN·01-1980
00:00:00"
just after
"DEC-12-207923:59:59".
(2.1.3) Abortion and Completion
of
Test
If
[[ESCll
or
[[.,Ill
is
entered control exits
to
the
ClK
test
menu (Figure
ClK-l).
(2.2) Clock Read
(2.2.1)
Outline
This program serves
to
read data
and
time
data
and
to
dis-
play
the
current
date
and
time.
(2.2_2) Operation
When this
test
is
specified,
the
system immediatelY executes
the
program and displays
the
message
as
shown
in
Figure
ClK-3.
(a)
Test
Read Time:
SEP-09-1985
19
:09 :09
The
system always displays
the
current
date
and
time.
The
program automatically converts
the
month
display
format
from numeric digits
to
alphabet
characters.
(2.2.3)
Abortion
and Completion
of
Test
If
[[ESCll
or
[[.,Ill
isentered,control
exitstotheClK
test
menu (Figure
elK-l).
-11-
(2.3) Clock
Adjustment
(2.3.1) Outline
PC~7000A
PC-7100
This program serves
to
.output
the
hardware signal
2048
Hz
for adjusting oscillating frequency
of
the
clock
circuit
to
the
test
terminals
of
SWQ
terminals (pins No.23)
of
the
RTC
[MC146818] .
This program calibrates
time
lag
by
setting
the
hardware
signal
to
2048
Hz by using
of
a frequency
counter.
To
conduct
the
frequency calibration,
adjust
the
trimmer
condenser [C11] on
the
circuit.
(2.3.2)
Operation
When specifying this
test,
system immediately
executes
the
program
and
displays
the
message
as
shown
in Figure
ClK·
4.
Therefore,
operation
is
not
needed.
Adjusting clock
(2048
Kz]
ON
!
(2.3.3)
Abortion
and Completion
of
Test
If
[[ESCll
or
[[.,Ill
is
entered
control
exits
to
the
ClK
test menu (Figure
ClK-l).
(2.4) RAM Display
(2.4.1)
Outline
This program displays
the
contents
of
the
internal
RAM
chips
of
the
RTC.
(2.4.2)
Operation
The system does
not
require
the
operator's
intervention.
It
immediately
executes
the
0
lAG
program
and
displays
the
message as
shown
in Figure
ClK~5.
It
dumps ASCII codes and characters
in
the
range
of
OxOE
of
Ox3F
of
the
address register.
(2.4.3)
Abortion
and Completion
of
Program
By
pressing either
[[ESCll
or
[[
.,Ill,
the
control
exits
to
the
ClK
test
menu (Figure
ClK-l).
To Next Page
Loading...
Need help?
General
