Sharp SD-AT1000

– 21 –
SD-AT1000
Figure 21 BLOCK DIAGRAM (10/10)
KDS121E
KDS120E
SLA5515MSLA5515M
SLA5515MSLA5515M
7 10 11 12
8
9
4
5
6
7 6 5 4 2 1 3 9
11
17 20 21 22 23 2416151413
8
1234
5
6
7
8
9
11
17 20 21 22 23 2416151413
9
10
11
13
12
15
16
17
18
19
20
21
14
6
5
4
3
2
1
9
10
11
13
12
15
16
17
18
19
20
21
14
6
5
4
3
2
1
9
10
11
13
12
15
16
17
18
19
20
21
14
6
5
4
3
2
1
9
10
11
13
12
15
16
17
18
19
20
21
14
6
5
4
3
2
1
D+5V
D+5V
AMP_VCC
AMP_VCC
R-CH_3
L-CH_3
R-CH_2
L-CH_2
VBOOTA
VBOOTB
OUTB
VBBB
OUTB
SA
VCC
SB
GND
VKK
VKK
OUTA
VDD
INB
OUTA
VBBA VBBB
INA
VBBA
VKK
VKK
GND
SB
VCC
SA
OUTB
VBBB
OUTB
VBOOTB
VBOOTA
VDD
VBBB
INB
OUTA
VBBA
INA
VBBA
OUTAOUTA
VBBA
INA
VBBA
OUTA
INB
VBBB
VDD
VBOOTA
VBOOTB
OUTB
VBBB
OUTB
SA
VCC
SB
GND
VKK
VKK
OUTA
OUTA
VBBA
VBBA
INA
VBOOTA
VBOOTB
INB
VDD
VBBB
VBBB
OUTB
OUTB
SA
SB
GND
VKK
VCC
R-CH_IN 2
AGND 2
L-CH_IN 2
Lch_+2
Lch_-2
Rch_-2
Rch_+2
Lch_+3
Lch_-3
Rch_-3
Rch_+3
L-CH_IN 3
AGND 3
R-CH_IN 3
PROTECT
PROTECT
OFFSET
RESET
ANALOG IN L-CH
ANALOG IN R-CH
GNDX XI VDDX OUTL(–) VDDR OUTR(+) OUTR(–) OUTL(+) GNDD VDDL
VDA VDDL
RESET
L-CH IN
R-CH IN
GNDA
NFR2(–)
NFL1(+)
NFL2(–)
NFR1(+)
TEST
TEST
NFR1(+)
NFL2(–)
NFL1(+)
NFR2(–)
GNDA
R-CH IN
L-CH IN
RESET
VDA VDDL
GNDD OUTL(+) OUTL(–) OUTR(–) OUTR(+) VDDR VDDX XI GNDX
ANALOG IN R-CH
ANALOG IN L-CH
1
2
3
2
1
3
1
2
3
2
1
3
VKK
VDDL
CNS500
FROM MAIN SECTION
17 18 20 19 24 23 24 23
SURROUNDSUBWOOFER CENTER
TO POWER SECTION
R-CH OUTPUT OFFSET ADJUSTMENT L-CH OUTPUT OFFSET ADJUSTMENT R-CH OUTPUT OFFSET ADJUSTMENT L-CH OUTPUT OFFSET ADJUSTMENT
LFA301
DA316
DA216 DA207
LFA200
ICA301
ICA302
ICA201
ICA202
VRA201
VRA200
VRA301
VRA300
CNA100
DA307
LFA201
LFA300
ICA200
IX0498AW
ICA300
IX0498AW
SWITCHING
AUDIO
POWER AMP.
SWITCHING
AUDIO
POWER AMP.
SWITCHING
AUDIO
POWER AMP.
SWITCHING
AUDIO
POWER AMP.
7TH ORDER ∆∑
MODULATION
CONVERSION LSI
7TH ORDER ∆∑
MODULATION
CONVERSION LSI