Sharp SD-AT1000 - Page 46

SD-AT1000
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1* XTO Output Crystal resonator output pin.
2 XTI Input Crystal resonator input pin.
EXTCLK Input Master clock input pin.
3 TVDD Input Power supply pin for the output buffer. 2.7 V – 5.5 V.
4 DVSS — Digital ground pin. 0 V.
5 DVDD Input Digital power supply pin. 4.5 V – 5.5 V.
6* TX Output Transmit channel (through data) output pin.
7 MCKO Output Master clock output pin.
8 LRCK Input/Output Input/output channel clock pin.
9 BICK Input/Output Audio serial data clock pin.
10 SDTO Output Audio serial data output pin.
11 SDTI1 Input DAC1 audio serial data input pin.
12 SDTI2 Input DAC2 audio serial data input pin.
13 SDTI3 Input DAC3 audio serial data input pin.
14* INT0 Output Interrupt 0 pin.
15 INT1 Output Interrupt 1 pin.
16 CDTO Output Control data output pin. (In the 4-line serial mode)
CAD1 Input Chip address 1 pin. (In the I
2
C bus mode)
17 CDTI Input Control data input pin. (In the 4-line serial mode)
SDA Input/Output Control data input/output pin. (In the I
2
C bus mode)
18 CCLK Input Control data clock pin. (In the 4-line serial mode)
SCL Input Control data clock pin. (In the I
2
C bus mode)
19 CSN Input Chip select pin. (In the 4-line serial mode)
CAD0 Input Chip address 0 pin. (In the I
2
C bus mode)
20 DZF2 Output Zero input detect 2 pin. (Note 1)
When the input data of group 2 is “0” for 8192 times in a row or the RSTN bit is “0”, it
changes to “H”.
OVF Output Analog input overflow detect pin. (Note 2)
It changes to “H” if the analog input of Lch or Rch overflows.
21 AVSS — Analog ground pin. 0 V.
22 AVDD Input Analog power supply pin. 4.5 V – 5.5 V.
23 VREFH Input Reference voltage input pin. AVDD.
24 VCOM Output Common voltage output pin. AVDD/2.
25* DZF1 Output Zero input detect 1 pin. (Note 1)
When the input data of group 1 is “0” for 8192 times in a row or the RSTN bit is “0”, it
changes to “H”.
26 LOUT3 Output DAC3 L channel analog output pin.
27 ROUT3 Output DAC3 R channel analog output pin.
28 LOUT2 Output DAC2 L channel analog output pin.
29 ROUT2 Output DAC2 R channel analog output pin.
30 LOUT1 Output DAC1 L channel analog output pin.
31 ROUT1 Output DAC1 R channel analog output pin.
32 LIN Input L channel analog input pin.
33 RIN Input R channel analog input pin.
34 PVDD Input PLL power supply pin. 4.5 V – 5.5 V.
35 R — External resistor pin.
36 PVSS — PLL ground pin. 0 V.
37* RX4 Input Receiver channel input 4 pin. (Internal bias pin)
38 SLAVE Input Slave mode pin. “L” : master mode or slave mode, “H” : slave mode
39* RX3 Input Receiver channel input 3 pin. (Internal bias pin)
40 TST Input Test pin. Connect to DVSS.
IC102 VHiAK4586VQ-1: ADC/DAC/DIR Converter (AK4586VQ) (1/2)
Terminal Name
Pin No.
Input/Output
Function
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.