SD-AT1000
– 54 –
1 VDDL Input L channel digital output section power terminal.
2 OUTL (+) Output L channel forward output terminal.
3 OUTL (–) Output L channel reverse output terminal.
4 GNDD — Digital output section ground terminal.
5 OUTR (–) Output R channel reverse output terminal.
6 OUTR (+) Output R channel forward output terminal.
7 VDDR Input R channel digital output section power terminal.
8 VDDX Input Oscillation section power terminal.
9 XI Input Quartz oscillator connection terminal. Clock necessary for the system is generated.
10 XO Output Quartz oscillator connection terminal. Clock necessary for the system is generated.
11 GNDX — Oscillation section ground terminal.
12 MCK Output System clock output terminal.
13 TEST Input Test terminal. As usual, it is used at "L".
14 NFR1 (+) Input R channel forward signal feedback input terminal.
15 NFR2 (–) Input R channel reverse signal feedback input terminal.
16 GNDA — Analog ground terminal for AD converter.
17 Rch IN Input R channel analog input terminal.
18 Rch Vref Input Reference voltage terminal for R channel.
19 Lch Vref Input Reference voltage terminal for L channel.
20 Lch IN Input L channel analog input terminal.
21 RESET Input Reset terminal. It is reset with "L".
22 NFL2 (–) Input L channel reverse signal feedback input terminal.
23 NFL1 (+) Input L channel forward signal feedback input terminal.
24 VDDA Input Analog current terminal for AD converter.
Pin No.
Port Name
Input/Output
Function
ICA100, ICA200, ICA300 RH-iX0498AWZZ: 7th Order Modulation Conversion LSI (IX0498AW)
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VDDL VDDA
NFL1(+)
NFL2(–)
RESET
Lch IN
Lch Vref
Rch Vref
Rch IN
GNDA
NFR2(–)
NFR1(+)
TEST
OUTL(+)
OUTL(–)
GNDD
OUTR(–)
OUTR(+)
VDDR
VDDX
XI
XO
GNDX
MCK
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
VDA
NFL1(+)
NFL2(–)
RESET
Lch IN
Lch Vref
Rch Vre
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