CPU 1518-4 PN/DP ODK (6ES7518-4AP00-3AB0)
36 Manual, 09/2016, A5E35681108-AA
Hardware function version
STEP 7 TIA Portal can be configured/integrated
as of version
Low limit of permitted range (DC)
High limit of permitted range (DC)
Reverse polarity protection
Power and voltage failure buffering
Power/voltage failure buffer time
Current consumption (rated value)
Power consumption from the backplane bus (ba
Incoming power to the backplane bus
slots for SIMATIC memory card 1
SIMATIC memory card required
Integrated (for ODK application)