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General| Brand | Siemens |
|---|---|
| Model | CPU 948 |
| Category | Controller |
| Language | English |
Describes applications and suitability of the S5-155U controller with CPU 948.
Highlights differences when converting programs from CPU 928B to CPU 948.
Introduces STEP 5 language for SIMATIC S5 controllers, covering basic and supplementary operations.
Describes Function Blocks (FB/FX) for recurring/complex functions, comparing them with other block types.
Explains cyclic program execution where the system calls OB 1 cyclically.
Describes organizing programs using OBs with conditional/unconditional calls for block processing order.
Explains CPU software tasks: START-UP, cyclic operations, and interrupt/error handling.
Introduces STEP 5 operations, their groups, and accumulator usage.
Explains semaphore operations (SED/SEE) for coordinating CPU access to common memory in multiprocessor systems.
Provides an overview of CPU modes, processing levels, abbreviations, and priorities.
Describes HARD STOP and SOFT STOP modes, their features, and LED indicators.
Covers START-UP modes: features, types (COLD, WARM RESTART), and handling of interrupts/parameters.
Describes RUN mode features: user program execution, timers, counters, BASP, IPC flags, and execution levels.
Lists common STEP 5 program errors and provides tips for avoidance.
Explains how to find error sources using LEDs, ISTACK, control bits, and BSTACK.
Explains how system program calls OBs for error handling and CPU reactions.
Details specific events interrupting processing and CPU reactions, including error OB calls and STOP mode.
Provides an overview of integrated self-test routines and their activation.
Allows setting or reading the system time (date/time) compatible with CPU 946/947.
Prevents interrupt nesting at block/operation boundaries, affecting TIMED and PROCESS INTERRUPTS.
Illustrates address area distribution and user memory versions (640 Kbytes/1664 Kbytes) for CPU 948.
Defines multiprocessor mode, usage criteria, and available communication mechanisms.
Defines data block exchange between CPUs via COR C coordinator, listing integrated special functions.
