Table of contents
CPU 31xC and CPU 31x, Technical Data
Manual, 01/2006 Edition, A5E00105475-06
xi
6.5 CPU 314C-2 PtP and CPU 314C-2 DP ................................................................................... 6-21
6.6 Technical data of the integrated I/O......................................................................................... 6-28
6.6.1 Arrangement and usage of integrated I/Os.............................................................................. 6-28
6.6.2 Analog I/O ................................................................................................................................ 6-34
6.6.3 Parameterization...................................................................................................................... 6-38
6.6.4 Interrupts.................................................................................................................................. 6-43
6.6.5 Diagnostics............................................................................................................................... 6-44
6.6.6 Digital inputs............................................................................................................................. 6-45
6.6.7 Digital outputs .......................................................................................................................... 6-47
6.6.8 Analog inputs ........................................................................................................................... 6-49
6.6.9 Analog outputs ......................................................................................................................... 6-51
7 Technical data of CPU 31x ..................................................................................................................... 7-1
7.1 General technical data ............................................................................................................... 7-1
7.1.1 Dimensions of CPU 31x............................................................................................................. 7-1
7.1.2 Technical specifications of the SIMATIC Micro Memory Card (MMC) ...................................... 7-2
7.2 CPU 312..................................................................................................................................... 7-3
7.3 CPU 314..................................................................................................................................... 7-8
7.4 CPU 315-2 DP ......................................................................................................................... 7-13
7.5 CPU 315-2 PN/DP ................................................................................................................... 7-19
7.6 CPU 317-2 DP ......................................................................................................................... 7-26
7.7 CPU 317-2 PN/DP ................................................................................................................... 7-33
7.8 CPU 319-3 PN/DP ................................................................................................................... 7-40
A Appendix.................................................................................................................................................A-1
A.1 Information about upgrading to a CPU 31xC or CPU 31x .........................................................A-1
A.1.1 Scope .........................................................................................................................................A-1
A.1.2 Changed behavior of certain SFCs............................................................................................A-2
A.1.3 Interrupt events from distributed I/Os while the CPU status is in STOP ...................................A-4
A.1.4 Runtimes that change while the program is running ................................................................. A-4
A.1.5 Converting the diagnostic addresses of DP slaves ................................................................... A-5
A.1.6 Reusing existing hardware configurations.................
................................................................A-5
A.1.7 Replacing a CPU 31xC/31x .......................................................................................................A-6
A.1.8 Using consistent data areas in the process image of a DP slave system ................................. A-6
A.1.9 Load memory concept for the CPU 31xC/31x ...........................................................................A-7
A.1.10 PG/OP functions ........................................................................................................................A-7
A.1.11 Routing for the CPU 31xC/31x as an intelligent slave...............................................................A-7
A.1.12 Changed retentive behavior for CPUs with firmware >= V2.1.0 ................................................A-8
A.1.13 FMs/CPs with separate MPI address in the central rack of a CPU 315-2 PN/DP,
a CPU 317 or a CPU 319-3 PN/DP ...........................................................................................A-8
A.1.14 Using loadable blocks for S7 communication for the integrated PROFINET interface .............A-9
Glossary ..................................................................................................................................... Glossary-1
Index................................................................................................................................................ Index-1