Technical data of CPU 31x
7.4 CPU 315-2 DP
CPU 31xC and CPU 31x, Technical Data
7-14 Manual, 01/2006 Edition, A5E00105475-06
Technical data
Data areas and their retentive address areas
Bit memory 2048 bytes
• Retentive address areas
Yes
• Preset retentive address areas
MB0 to MB15
Clock memory 8 (1 memory byte)
Data blocks
• Number
1023
(in the 1 to 1023 range of numbers)
• Size
16 Kbytes
Local data capacity Max. 1024 bytes per task/510 per block
Blocks
Total 1024 (DBs, FCs, FBs)
The maximum number of blocks that can be
loaded may be reduced if you are using another
MMC.
OBs See the Instruction List
• Size
16 Kbytes
Nesting depth
• Per priority class
8
• Additional within an error OB
4
FBs See the Instruction List
• Number, Max.
1024
(in the 0 to 2047 range of numbers)
• Size
16 Kbytes
FCs See the Instruction List
• Number, Max.
1024
(in the 0 to 2047 range of numbers)
• Size
16 Kbytes
Address areas (I/O)
Total I/O address area Max. 2048 bytes / 2048 bytes
(can be freely addressed)
Distributed Max. 2000
I/O process image 128/128
Digital channels Max. 16384
Of those central Max. 1024
Analog channels Max. 1024
Of those central Max. 256
Removal
Module rack Max. 4
Modules per rack 8
Number of DP masters
• Integrated
1
• Via CP
4