Glossary
Glossary-2
PLC S7-300, CPU Specifications CPU 312 IFM to CPU 318-2 DP
A5E00111190-01
Backup memory
Backup memory ensures buffering of CPU memory areas
CPU, using no battery. A configurable number of timers, counters, memories
and data bytes (retentive timers, counters, memories and data bytes) is backed
up.
Bit memory
Memory bits are objects of CPU system memory, used for storing
intermediate results. They can be accessed in units of a bit, byte, word or
DWORD.
Bus
A bus is a communication medium connecting several nodes. Data transmission
can be serial or parallel across electrical conductors or fiber-optic cables.
Bus segment
A bus segment is a self-contained section of a serial bus system. Bus segments
are interconnected using repeaters.
Chassis ground
Chassis ground is the totality of all the interconnected inactive parts of a piece of
equipment on which a hazardous touch voltage cannot build up even in the event
of a fault.
Clock memories
Memories that can be used for clocking purposes in the user program (1 memory
byte).
Note
Note in the case of S7-300 CPUs that the clock memory byte is not exceeded in
the user program.
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