Table of contents   
  CPU 31xC and CPU 31x, Technical Data 
xii  Manual, 01/2006 Edition, A5E00105475-06 
Tables 
Table 1  Application area covered by this manual ...................................................................................... iii 
Table 1-1  Ambient influence on the automation system (AS).................................................................... 1-1 
Table 1-2  Galvanic isolation ....................................................................................................................... 1-1 
Table 1-3  Communication between sensors/actuators and the PLC......................................................... 1-2 
Table 1-4  The use of local and distributed I/O ........................................................................................... 1-2 
Table 1-5  Configuration consisting of the Central Unit (CU) and Expansion Modules (EMs).................... 1-2 
Table 1-6  CPU performance ...................................................................................................................... 1-3 
Table 1-7  Communication .......................................................................................................................... 1-3 
Table 1-8  Software ..................................................................................................................................... 1-3 
Table 1-9  Supplementary features............................................................................................................. 1-4 
Table 2-1  Mode selector switch settings .................................................................................................... 2-3 
Table 2-2  Differences of the CPUs 31xC ................................................................................................... 2-4 
Table 2-3  Mode selector switch settings .................................................................................................... 2-6 
Table 2-4  Mode selector switch settings .................................................................................................... 2-8 
Table 2-5  Mode selector switch settings .................................................................................................. 2-10 
Table 2-6  Mode selector switch settings .................................................................................................. 2-12 
Table 2-7  General status and error displays of the CPU 31x .................................................................. 2-13 
Table 2-8  Bus error displays of CPU 31x................................................................................................. 2-13 
Table 3-1  Operating modes for CPUs with two DP interfaces ................................................................... 3-2 
Table 3-2  Communication services of the CPUs ....................................................................................... 3-6 
Table 3-3  Client and server in S7 communication, using connections with unilateral /  
bilateral configuration................................................................................................................. 3-9 
Table 3-4  GD resources of the CPUs....................................................................................................... 3-10 
Table 3-5  Number of routing connections for DP CPUs .......................................................................... 3-13 
Table 3-6  New System and Standard Functions/System and Standard Functions to be Replaced........ 3-20 
Table 3-7  System and Standard Functions in PROFIBUS DP that must be Implemented with  
Different Functions in PROFINET IO ....................................................................................... 3-21 
Table 3-8  OBs in PROFINET IO and PROFIBUS DP.............................................................................. 3-22 
Table 3-9  Comparison of the System Status Lists of PROFINET IO and PROFIBUS DP ...................... 3-23 
Table 3-10  Distribution of connections....................................................................................................... 3-30 
Table 3-11  Availability of connection resources......................................................................................... 3-31 
Table 3-12  Number of routing connection resources (for DP/PN CPUs)................................................... 3-32 
Table 3-13  Interrupt blocks with DPV1 functionality................................................................................... 3-34 
Table 3-14  System function blocks with DPV1 functionality ...................................................................... 3-34 
Table 4-1  Retentivity of the RAM ............................................................................................................... 4-2 
Table 4-2  Retentivity behavior of memory objects (applies to all CPUs with DP/MPI-SS) ........................ 4-3 
Table 4-3  Retentive behavior of DBs for CPUs with firmware >= V2.1.0................................................... 4-4