Sony CDP-497 - Page 10

CDP-497
•
IC301
(CXD2500QA)
PIN
FUNCTION
Pin
No.
I
Pin
Name
I
I/O
Function
Focus
OK
input
pin. Used
for SENS
output and
servo auto sequencer.
Spindle
motor
output
filter
switching
output.
Spindle
motor
ON-OFF
control
output.
Spindle
motor
servo control.
Spindle
motor
servo
control.
Samples
GFS
at 460 Hz,
and
outputs
H when GFS
is
H.
Outputs L if L
continues
eight
times.
Oscillation
circuit
output
for analog
EFM PLL.
Oscillation
circuit input for
analog EFM
PLL. fLOCK=8,6436
MHz.
TEST
pin.
Normally GND.
Charge
pump
output for
analog
EFM and
PLL.
PLL
charge pump
output for
variable pitch.
Clock
input from
the external
VCO
for
variable
pitch. fCcenter=l 6.9344
MHz.
Filter
output
for master PLL
(Slave=Digital
PLL).
Filter
input
for
master PLL.
PLL
charge
pump output
for
master PLL.
Analog GND
Master VCO
control
voltage
input.
Analog
power supply
(+5V)
EFM
signal
input.
Asymmetry
circuit
regulated
current
input.
Asymmetry
comparative voltage
input.
EFM
full
swing
output
(L=Vss,
H=Vdd)
LrAsymmetiy
circuit OFF
HrAsymmetry
circuit ON.
Not used.
Audio
data output
mode
switching
input. Serial
output at L,
parallel
output at H.
D/A
interface
for 48 bit slot.
Word-clock f=2Fs.
D/A
interface
for 48 bit
slot. LR
clock f=Fs.
Power
supply
(+5V).
DA16
(MSB)
output when PSSL=1
.
48 bit slot
serial data when PSSL=0
(2s’COMP, MSB
first).
DA15
output when PSSL=1.
48 bit slot bit
clock
when
PSSL=0.
DA14
output when PSSL=1.
64 bit slot
serial data when PSSL=0
(2s*
COMP, LSB first)
DA13
output
when
PSSL=1.
64
bit slot bit clock when PSSL=0.
DA
12
output
when
PSSL=1.
64
bit slot LR clock when PSSL=0.
DAI 1
output
when
PSSL=1.
GTOP
output when
PSSL=0.
DA10
output
when
PSSL=1.
XUGF
output when
PSSL=0.
DA09
output
when PSSL=1.
XPLCK
output when
PSSL=0.
DAOS
output
when PSSL=1
.
GFS
output when PSSL=0.
DA07
output
when
PSSL=1
. RFCK
output when
PSSL=0.
DA06
output
when
PSSL=1
.
C2P0
output
when
PSSL=0.
DAOS
output
when
PSSL=1.
XRAOF output
when
PSSL=0.
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