Sony CDP-70 - SECTION 3 DIAGRAMS

VOLT/DIV: IV
TIME /DIV : 2mS
ov
Incorrect Examples (fundamental wave appears)
low tracking gain
VOLT/DIV: IV
TIME /DIV : 2mS
OV
high tracking gain
higher fundamental wave than for low gain)
VOLT/DIV: 1V
TIME /DIV : 2mS
ov
Adjustment Location: main board
FEO FOCUS
rvio3 { GAIN
ADJ
Feat
TRACKING TEO L.-.
Gan RV104
ADJ
SECTION 3
DIAGRAMS
3-1. SEMICONDUCTOR LEAD LAYOUTS
CXA1081S GP1F31T M5231TL
vr3ses
CXA1082BS GP1U52 M5294P
PCMS56P-S
16 1514131211109
12345678
(Top view)
CXA1291P
LC9600P-144 NJM4556S
t234se7as
MSC6458-36SS
CXD1125Q
DTA144ES
DTC114ES
DTC143TS
DTC144ES
(Top view)
MARKING SIOE VIEW
ae
CxD2550P
M5218P
DTC114EF
M74HC6004P
1g 10
= al ~
/
; (Top view) ? (Top view) 2 \
CDP-770
BR4361F
™~
cathode
anode
HZS9B2L
RD5.1ESB2
18$132
cathode
anode
US1060M
10E2
cathode
anode