Sony CDP-M11 - Page 5

CDP-M11/M12/M21/M41
1-2. PIN FUNCTION OF IC101 AND IC401
@1C101 (CXA1372Q) PIN FUNCTION
Pin No. Pin Name
VC
Description
GND
when
two
(+)
dual
power
supplies
are
in
use,
or
the
center
voltage
(2.5V)
when
a
single
power
supply
is
in
use.
2
Time
constants
for
gain
switching
in
normal
mode/down
mode
and
for
focus
gain
are
3
I
|conncted
between
the
FGD
and
FS3
pins.
4
FLB
I
|
The
capacitor
for
low
frequency
boost
in
the
focus
servo
loop
is
connected.
5
FEO
O
|
Focus
drive
output.
6
FE—
I
|Inverted
input
to
focus
amplifier.
7
SRCH
I
|
Time
constants
to
generate
the
focus
search
waveform
are
connected.
8
TGU
I__|
Time
constants
for
gain
switching
in
normal
mode/up
mode
and
for
tracking
gain
are
9
TG2
Ij
connected
between
TGU
pin
and
TG2
pin.
Analog
power
supply
(5V
when
+
dual
power
supplies
are
in
use,
5V
when
a
single
power supply is in use.)
Tracking drive output.
Inverted input to tracking amplifier.
Non-inverted input to sled amplifier.
Sled drive output.
Non-inverted input to sled amplifier.
The 610k2 phase compensator resistor is connected to this pin.
The current setting resistor is connected to this pin.
me Hie OR HO
The limit switch is connected to this pin.
Analog
power
supply
(—5V
when
+
dual
power
supplies
are
in
use,
or
GND
when
a
single
power
supply
is
in
use.)
Direct control pin.
Sled run-away prevention circuit operates when this signal is "L”.
Serial data transfer clock input that is supplied from CPU (or DSP).
Latch input from CPU (or DSP).
Serial data input from CPU (or DSP).
System reset. ”L” to reset.
Output to tracking counter.
SENS output.
Digital
ground
(GND).
(GND
when
+
dual
power
supplies
are
in
use.
GND
when
a
single
power
supply
is
in
use.)
CO O]— me me me
Mirror output.
Defect output. ”H” when defective.
Auto-assymmetry control input.
EFM comparator output.
Focus OK.
Defect-bottom-hold input (inout by capacitive coupling).
Defect-bottom-hold output.
or o0KF/0 0
Digital
power
supply.
(+5V
when
+
dual
power
supplies
in
use.
+5V
when
a
single
power
supply
is
in
use.)
The defect-bottom-hold capacitor is connrcted to this pin.
The mirror hold capacitor is connected to this pin.
RF signal input (input by capacitive coupling).
RF signal input (input by DC coupling).
Digital
power
supply
(—5V
when
+
dual
power
supplies
are
in
use.
GND
when
a
single
power
supply
is
in
use.)
Tracking zero-cross comparator input.
Tracking error input.
The defect prevention hold capacitor is connected to this pin.
Anti-shock input.
Focus zero-cross comparator input.
Focus error input.
The defect prevention hold capactior is connected to this pin.