Sony D-EJ119 - Schematic Diagram - Main Board (3;3)

1414
D-EJ119/EJ120/EJ121
D-EJ119/EJ120/EJ121
5-6. SCHEMATIC DIAGRAM – MAIN BOARD (3/3) –
• See page 16 for IC Block Diagrams. • See page 15 for Waveforms.
R416
C418
C419
C420
C421
C422
C423
R419
L403
C433
R428
R421
R439
R444
L404
C429
C428
C434
C436
C437
L406
L409
C438
L411
R440
C427
C408
C445
C448
C440
R438
R434
C441
R427
CN401
L401
L402
C413
C432
C450
R457
C447
C409
CN402
R412
C415
R411
R413
C426
L407
J401
C405
C407
C410
D408
C435
C425
D402
D403
D404
D405
D407
D409
D410
IC403
Q402
Q403
Q404
Q406
Q407
R405
C411
C414
220
0.1
0.022
0.022
4700p
4700p
4700p
10k
1
100k
10k
47k
100k
0.1
4.7
16V
47
4V
47
4V
47
4V
1
47k
0.01
0
1
0.047
2200p
10k
100k
0.22
47k
2P
1
220
4V
1
10k
1000p
4.7
4P
47k
0.22
220k
47k
220
6.3V
1
1
1
UDZSTE-175.1B
22
16V
22
16V
RB160M-30TR
MA2YD2300LS0
KDS160-RTK
RB160M-30TR
KDS160-RTK
KDS160-RTK
RSB6.8STE61
BH6580KV
2SB1115A-YQ
SWITCH
2SC4154-F
SWITCH
KTA2015Y-RTK
SWITCH
2SA1602-F
SWITCH
KTC4075YGR-RTK
DEFFERENTIAL
0
1
0.01
PW
M
BUS 1
BUS 3
VIN
VCC1
VCC2
VCPU
D GND
A GND
COM
P
BATMNT
VCC4
GND-2
BUS 2
SYNC
D AU GND
BUS 5
POWERLT
RESET
SDTO
SCK
XWAKEUP
FG
XRST
CHGMNT
DCINMNT
CPOL
FIN-
FIN+
TIN+
TIN-
SIN-
SIN+
F+
T-
F-
T+
DCIN
REGB
DET
DCIN S
VMMNT
CHGMNT
BATM1
BATM2
BBK
PREGND
PWM
SOFTPWM
FG
CSL2
CSL1
W1
V1
U1
COM
LATCH
DATA
CLOXK
WAKEUP
XRST
RESET O
SYNC
PREGND
SOFT
SLOW
EI
EO
VCC2NF
VCPUNF
PMG
STNG
SEP
SEM
SEO
GSW
FIN3
RIN3
FIN2
RIN2
FIN1
0GND
VM
1
FO1
PGND1
RO1
VM
12
FO2
PGND2
RO2
VM
23
FO3
PGND3
RO3
VM
3
SPVCC
U OUT
SPGND1
V OUT
SPVCC2
W
OUT
SPGND2
LG
VG
SSW
VCC3
VIN
DSW
POW
ERGND
USW
VCC
VCC2 2.0V
VCC1 2.25V
VCC0 2.25V
CHGB
VCPU 2.0V
RIN1
FOCUS/TRACKING COIL DRIVE
SLED/SPINDLE MOTOR DRIVE
POWER CONTROL
DC IN 4.5V
DRY BATTERY
SIZE"AA"
2PCS,3V
(IEC DESIGNATION LR6)