Sony HDVF-C30W - Page 47

3-3
HDVF-C30W
1
2
3
4
5
6
7
8
PGND
DIO1
I/O
DIO2 I/O
SENSE IN
VC IN
AGND
CT
IN
PROG IN
16
15
14
13
12
11
10
9
GATE OUT
V IN IN
V REF OUT
FAULT
OUT
SHDN
IN
R MIN OUT
R MAX OUT
PWM IN
HIGH POWER CCFL CONTROLLER
—TOP VIEW—
INPUTS
CT
PROG
PWM
SENSE
SHDN
VC
V
IN
OUTPUTS
FAULT
GATE
R
MAX
R MIN
V REF
INPUTS/OUTPUTS
DIO1, DIO2
OTHERS
AGND
PGND
: DETERMINE THE PWM MODULATION
FREQUENCY
: CONTROL THE LAMP CURRENT
: CONTROL THE PERCENTAGE OF THE
PROG RANGE
: CURRENT SENSE COMPARATOR
: CONTROL THE OPERATION OF THE LT1768
: SUMMING JUNCTION
: VOLTAGE SUPPLY
: OPEN COLLECTOR
: NPN HIGH CURRENT STAGE
: REGULATED VOLTAGE OF 1.25 V
: REGULATED VOLTAGE OF 1.26 V
: REGULATED 5 V
: COMMON CONNECTION
: ANALOG GROUND
: HIGH CURRENT GROUND PATH
UNDERVOLTAGE LOCKOUT
THERMAL SHUTDOWN
V REF
CONTROL
MODE
I VC
V
CCLAMP
FAULT
PWM PERIOD
1.25 V
I RMAX
1.26 V I R MIN
0
1 V
4 V
V PWM
1 V
MULTI-MODE
DIMMING BLOCK
OSC
SLOPE
S
R
Q
V IN
SW BLANK
GATE
(ICIO1 + ICIO2)
GAIN
I VC
ICIO2 < 125uA
ICIO1 < 125uA
VIN
15
SHDN
VREF
RMIN
RMAX
PROG
PWM
CT
12
14
11
10
8
9
7
VC
5
DIO1 DIO2
23
GATE
16
SENSE
4
FAULT
13
IC
LT1768CGNTR-100 (LINEAR TECH)