SR830 DSP LOCK-IN AMPLIFIER
1-5
SPECIFICATIONS
SIGNAL CHANNEL
Voltage Inputs Single-ended (A) or differential (A-B).
Current Input 10
6
or 10
8
Volts/Amp.
Full Scale Sensitivity 2 nV to 1 V in a 1-2-5-10 sequence (expand off).
Input Impedance Voltage: 10 MΩ+25 pF, AC or DC coupled.
Current: 1 kΩ to virtual ground.
Gain Accuracy ±1% from 20°C to 30°C (notch filters off).
Input Noise 6 nV/√Hz at 1 kHz (typical).
Signal Filters 60 (50) Hz and 120(100) Hz notch filters (Q=4).
CMRR 90 dB at 100 Hz (DC Coupled).
Dynamic Reserve Greater than 100 dB (with no signal filters).
Harmonic Distortion -80 dB.
REFERENCE CHANNEL
Frequency Range 1 mHz to 102 kHz
Reference Input TTL (rising or falling edge) or Sine.
Sine input is1 MΩ, AC coupled (>1 Hz). 400 mV pk-pk minimum signal.
Phase Resolution 0.01°
Absolute Phase Error <1°
Relative Phase Error <0.01°
Orthogonality 90° ± 0.001°
Phase Noise External synthesized reference: 0.005° rms at 1 kHz, 100 ms, 12 dB/oct.
Internal reference: crystal synthesized, <0.0001° rms at 1 kHz.
Phase Drift <0.01°/°C below 10 kHz
<0.1°/°C to 100 kHz
Harmonic Detect Detect at Nxf where N<19999 and Nxf<102 kHz.
Acquisition Time (2 cycles + 5 ms) or 40 ms, whichever is greater.
DEMODULATOR
Zero Stability Digital displays have no zero drift on all dynamic reserves.
Analog outputs: <5 ppm/°C for all dynamic reserves.
Time Constants 10 µs to 30 s (reference > 200 Hz). 6, 12, 18, 24 dB/oct rolloff.
up to 30000 s (reference < 200 Hz). 6, 12, 18, 24 dB/oct rolloff.
Synchronous filtering available below 200 Hz.
Harmonic Rejection -80 dB
INTERNAL OSCILLATOR
Frequency 1 mHz to 102 kHz.
Frequency Accuracy 25 ppm + 30 µHz
Frequency Resolution 4 1/2 digits or 0.1 mHz, whichever is greater.
Distortion f<10 kHz, below -80 dBc. f>10 kHz, below -70 dBc.1 Vrms amplitude.
Output Impedance 50 Ω
Amplitude 4 mVrms to 5 Vrms (into a high impedance load) with 2 mV resolution.
(2 mVrms to 2.5 Vrms into 50Ω load).
Amplitude Accuracy 1%
Amplitude Stability 50 ppm/°C
Outputs Sine output on front panel. TTL sync output on rear panel.
When using an external reference, both outputs are phase locked to the
external reference.
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