Chapter 4: BIOS
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Enhanced Halt State (C1E)
Select Enable to enable "Enhanced Halt State" support, which will signifi cantly reduce the
CPU's power consumption by minimizing CPU's clock cycles and reduce voltage during a
"Halt State." The options are Disable and Enable.
Package C State Control
Package C State
Use this feature to set the limit on the C-State package register. The options are C0/1 state,
C2 state, C6 (non-Retention) state, C6 (Retention) state, No Limit, and Auto.
Chipset Confi guration
Warning: Setting the wrong values in the following sections may cause the system to malfunc-
tion.
North Bridge
This feature allows the user to confi gure the settings for the Intel North Bridge.
UPI (Ultra Path Interconnect) Confi guration
This section displays the following UPI General Confi guration information:
• Number of CPU
• Number of IIO
• Current UPI Link Speed
• Current UPI Link Frequency
• UPI Global MMIO Low Base/Limit
• UPI Global MMIO High Base/Limit
• UPI PCI-E Confi guration Base/Size
Degrade Precedence
Use this feature to select the degrading precedence option for Ultra Path Interconnect
connections. Select Topology Precedent to degrade UPI features if system options are in
confl ict. Select Feature Precedent to degrade UPI topology if system options are in confl ict.
The options are Topology Precedence and Feature Precedence.
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