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Supermicro X11DPT-PS - CPU1;CPU2 Configuration; IOAT Configuration

Supermicro X11DPT-PS
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Chapter 4: BIOS
69
CPU1 Con guration/CPU2 Con guration
IOU0 (IIO PCIe Br1)
This feature con gures the PCI-E Bifuraction setting for a PCI-E port speci ed by the user.
The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IOU1 (IIO PCIe Br2)
This feature con gures the PCI-E Bifuraction setting for a PCI-E port speci ed by the user.
The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IOU2 (IIO PCIe Br3)
This feature con gures the PCI-E Bifuraction setting for a PCI-E port speci ed by the user.
The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
MCP0 (IIO PCIe Br4)
This feature con gures the PCI-E Bifuraction setting for a PCI-E port speci ed by the user.
The options are x16 and Auto.
MCP1 (IIO PCIe Br5)
This feature con gures the PCI-E Bifuraction setting for a PCI-E port speci ed by the user.
The options are x16 and Auto.
CPU1 PCI-E Br0D00F0 - Port 0/DMI (Available for CPU 1 Con guration
only)
Link Speed
This feature con gures the link speed of a PCI-E port speci ed by the user. The options
are Auto, Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s), and Gen 3
(Generation 3) (8 GT/s)
The following information will be displayed as well:
PCI-E Port Link Status
PCI-E Port Link Max
PCI-E Port Link Speed
PCI-E Port Max (Maximum) Payload Size (Available for CPU 1 Con guration only)
Select Auto for the system BIOS to automatically set the maximum payload value for a
PCI-E device speci ed by to user to enhance system performance. The options are Auto,
128B, and 256B.
IOAT Con guration
Disable TPH (TLP Processing Hint)
TPH is used for data-tagging with a destination ID and a few important attributes. It can
send critical data to a particular cache without writing through to memory. Select No in this

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