Teac MT-20D-IO - Page 41

3-4-6 Counter/timer
The counter/timer consists of timers within an IC 82C54(U4) and IC 8lC55-
(U6). The timer within IC 8lC55 divides the frequency of the CPU clock to
generate the clock of 50 kHz.
Among the three counters within Ie 82C54, the counter 0 (the output from Pin
No. 10) generates the write clock (TP3) by dividing the frequency of the
3.6 MHz clock, and supplies the resultant write clock to the write control
logic (U14/2309).
The coulter 1 receives the above-mentioned 50 kHz clock as the input, and
uses it as a timer for monitoring the various times.
The counter 2 receives the encoder pulses (J4-l2) outputted from CMT as the
input, and controls the tape position by counting these pulses.
- 329 -