Tektronix 576 - Safety and Interlock System

O pe r ating I n st ru ctions-Ty pe
576
peak voltage set by t he MAX PEAK V O L TS
switc h an d t he
V
A R
IA BLE CO LLE CTO R S UPPL Y control
. Wh en t h e
M
OD
E switc h is set to DC (ANTI L OO
P )
or
LE A K AG E
(EM ITT ER C URREN T) t he Collector Su pp ly
out p ut is α
DC
voltage equ al to t he peak voltage set by the MAX PEAK
V O L TS
switc h
an
d t he V A R IA BLE CO LLE CTO R S UPPL
Y
control
.
T
h is DC voltage may be eit h er p ositive or
negative .
T he DC
mo de is very useful w h en t he normal d
is p
lay
is
ex
h ibiting excessive loo p ing .
Occasionally some of t he ch aracteristic curves d is p laye d
on the CRT
consist of loo p s rat he r t han well d efi ned lines
(see
F
ig .
2-23) . T h is effect is known as loo p ing and
is most
noticeable at very low or very hig h values or
current .
L oo p ing is generally cause d by stray ca p
acitance wit h in t he
Ty p e 576, and d evice ca p acitance
. It may also be cause d by
heating of t he device
under
test . T h
e L OO P I NG CO M PEN-
SATIO N control p rovi d es com p
lete com p ensation fo r non
h eat- r elate d looping du e to t he Type 576 an d any
stan d ard
d evice ad a p ter w h ic h may be use d . In
general it does not
com p ensate for any a dd ed ca p acitance
intro d uced by t he
device un d er test . (Co n trol
has some effect in re du cing
stray ca p acitance in small dio d es, and
voltage- d riven t h ree
terminal d evices .) If uncom p ensated
loo p ing is h in d ering
measurements, the M OD
E
switc
h sh oul d be set to DC
(ANTI L OO
P ) .
If t
he collector sweep, mo de of op eration
(MOD E switc
h set to N O RM) is d esire d , an imaginary line
lying insi d
e
t
he
loop
an d e q ui d istant from each si de of t he
loop is t h
e
best a pp
roximation of t he actual ch aracteristic
curve (see F ig . 2-23) . L oo p
ing due to h eating may be re-
duce d by using t he p ulse d ste ps
operation of t he Ty p e 576 .
F ig . 2-23 . E xam pl e of α display ex h ibiting loo p ing .
Interloc
k System
Wh
enever
t
he
MAX PEAK
V O L TS switc h is in t he 75,
350 or 1500
positions, t he yellow CO LLE CTO RS UPPL Y
V O L TAG
E
DISA
BLE D lig h t comes on . T h is lig h t indicates
t h at t h
e
Collector S
u
pp ly is d isable
d . In or d er to enable t h e
Collector Su pp ly und er t h ese circumstances,
t h e Ty pe 576
uses an interloc k system . Wh
en t he yellow lig h t is on, t h e
Ζ - 22
protective box
must be installe d over t he accessories
con-
nectors (see
F
ig .
2-7) . Wh en t he p rotective box is in place
and t h
e
li d
close d , t he yellow lig h t turns off and t h
e re
d
lig h t turns on . T he re d
lig h t in d icates t h at t he Collector
Su pp ly is enable d an d t h at α d angerous
voltage may a pp ear
at t he Collector terminals .
F
or
f u rt h er information about
t he interloc k system, see t h
e Circuit Descri p tion .
Ste p Generator
T he Ste p
Generator p rovi d es current or voltage w h ic
h
may be app lie d
to t he base or t h e emitter of t h
e
d
evice
und er test . T
h e out p ut of t he Ste p Generator is families of
ascen
d
ing ste p s of current o r voltage (see F ig . 2-24)
. Wh en
t h ese ste
p s toget h er wit h t he Collector Su pp ly
outp ut are
a pp
lie
d to
t he d evice un d er test, families of
ch aracteristic
curves of t he d evice are d is p laye d on t
h e C R T .
T h e NUMBER
O F STEP S switc h d etermines t h
e
number
of ste
p
s p
e r family and has α range of from 1 ste
p to 10
ste
p
s . T
he
A
MPL IT U D E switc h determines
t h e am p lit u d e
of
each ste p and p rovi d es both current ste
p
s an d
voltage
ste p s
. T h
e range of ste p amplitudes available a r e from 50
ηΑ /ste
p to 200 mA/step for current ste p s an d
from 5
m V /ste
p
to
2 V /ste p fo r voltage steps . T h e ST
EP MUL T
.1 Χ button,
w h en p resse d , d ivi d es t h e ste p am p litu d
e by
10 . Wh
en voltage ste p s are being a pp lie d to t
he base of α
transistor,
t h e base cu rr ent increases very ra p i d ly
wit h
increasing
base voltage (note Caution on front- p anel) . To
avoi d d amage
to t h e tra n sistor w hen using voltage ste
p
s,
current limiting is p rovi d
e
d
t h roug h t he C URREN T L I M IT
switc h .
F ig . 2-24 . Ste p Generator ou t pu t in bot h p o
l arit i es
T
he
rate of
generation of ste p s by t he Ste p Generator is
determined
by t he R AT E buttons . Wh en t he N O RM R
AT E
button is
pressed, ste p s are gene r ate d at α r ate of
120
ste p s/secon
d (assuming α 60 H z line fre q uency), or o n
e
ste
p
per cycle of
t
he Collector Su pp ly, PO L A R ITY switc h set to
+(
ΝΡΝ ) or -(
ΡΝΡ ) . In t h is case eac h ste p occurs at t h
e
beginning of α
Collector Su pp ly cycle . Wh en the .5X R AT
E
button
is presse d , t he Step Generator rate is 60
ste p s/
MENE
Best a ppr oxi m ation
of act u al ch a r acteristic
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