Tektronix 576 - Page 59

Ci r cuit Desc r i p tio n -Type 576
Dis p lay Switc h ing
O n ce t he d esi r ed voltages an d cu rrents h ave b
een sense d
b y t he dis p lay sensitivity switc h ing circuit, an d once
t
h e
d esire d p ositioni ng cu r rents h ave been obtaine d from t he
d is p lay p ositio n ing circuit, t he resulti ng voltage signals and
p ositio n ing c u rre n ts must be a pp lie d to t h e dis p lay
am p lifiers . Before being applie d to t h e d is p lay am p lifiers,
h owever, t h ese signals p ass t hroug h t h e d isplay switc h ing
circ u it (see t h e Dis p lay Am p lifiers and Dis p lay Positioning
sc h ematics) .
U nd er normal op erating con d itions wit h neit h er t h e DIS-
PL AY I NVER T, t h e Z ER O nor t he CA L bu tto n s p resse d ,
t h ese sig n als and currents p ass d irectly to t he d is p lay am p li-
fers . If t h e DIS PL AY I NVE RT button is p resse d , however,
t he
sig n al a n
d
cu
rrent input
li n es
to
both am p lifiers a r e
reverse d .
T h
is causes t
h
e dis p lay on t he C
R T
to be
i n verte d ,
both vertically an
d h
orizontally .
T he Z ER O butto n , w h
en p
resse d , d isconnects t he signal
in p ut lines from both p ai rs of h ig h im p ed ance in p uts an d
s h orts t he in p ut p airs toget he r . T h is p rovi d es α zero r efe r -
ence fo r b ot h d is p lay am p lifiers . If t he DIS PL AY O FF S ET
controls a r e bei ng used w hen t he Z ER O bu tton is p resse d ,
offset p ositioning c u rr ent is cause d to flow as if t h e
C EN T ERL I NE VA LUE switc h were set to 0 (see Dis p lay
Positioni n
g
sc h
ematic
a nd d isc
u
ssion of
p
ositioni n g)
.
T he CAL button, w hen p resse d ,
disconnects t he sig n al
i np ut lines from both pairs of h
ig h im p edance in p uts and
a p plies α substitute voltage across
eac h inp u t pair w h ic h
s h oul d cause full graticule deflection
(10 divisions by 10
d ivisions) . T h is p rovi d es α means of
ch ec k i ng t he acc ur acy
of calibration of t h e d is p lay am
p lifiers . T he substitute volt-
age is d etermine d by R 501 t hroug
h R 513 and by D507 .
Since eac h d is p lay am p lifier h as t h ree gains to
c h ec k , t h ree
s ub stit
u
te voltages
m u st be available . R elays K537C,
K 541C, K 637C a nd K 641C d
etermine w h ic h voltages are
app lie d to t he h ig h im p edance
in p ut p ai rs for various
settings of
t h
e
VER
TICA L a nd
H
O
R IZO N TAL switc h es . If
t
he DIS PL AY O FF SE T c u rre n t controls are being use d
w hen t he CA L b u tton is p resse d ,
offset current is ca u se d to
flow as if t he C EN T ERL I NE VA LUE
switc h were set to 10 .
Dis p lay Amplifiers
T h e vertical an d h orizontal
d isplay am p lifiers are i den ti-
cal wit h α few mi n o r exce p tions . T h ey a r e both differential
am
p lifiers, eac h wit h two sets of differential in p uts an d one
set of d ifferential outp uts . One set of d ifferential in p uts
is
h ig h impe d ance and receives its in p uts from t h e
d isplay
sensitivity switc h ing ci r cuit . T he ot h er set
of d ifferential
in p uts is low impe dan ce and t h eir i n p uts are t he d iffere n
tial
p ositio n i n g currents from t he d isplay p ositioning circuit
.
T
h
e
d iffe r
e
n tial out p uts are connecte d to t he deflection
p lates of t
h
e
CRT and con trol t h e p otential on t he d eflec-
tion plates .
T h
e
simp lified sc h ematic in F ig . 3-12 will h el p in und er-
sta nd i n g
t h e operatio n of t h e d is p lay am p lifie r s . T he d is-
3- 1 8
play am p lifiers control t he voltage between t he deflection
p lates of the C R T b y controlling t he c ur rents t h roug
h loa d
resistors R
L1
an d R
L2
. T h e curre n ts
1
L1
and
I L2
con-
d ucte d by t he loa d resistors are controlled by two
means :
d ifferential cu rre n t 1 s an d p ositioning curre
n
ts
ΙΡ 1
an d
Ιρ 2
.
T h
e
d ifferential current flows t h ro ugh source
coupling resis-
tor
R s
w
h enever t h ere is α d iffere n tial voltage sig n
al app lie d
to t h e h ig h im p ed ance gate in
p
uts of
FETSQ1 A and Q1 Β .
Positioning curre n ts
ΙΡ
1
an
d Ιρ 2 are determined by t he
resistance between t
h
e
emitter of Q2A and -75 volts and
betwee n Q2 B and -75
volts, res p ectively .
T he relations h
i p between t he loa d resistor cu rrents and
t he ot h er cur r
ents i n t he am p lifier is as follows :
1L
= Ιρ -
(ID
+ 1 s )

( Eq
uatio n 3-1)
E q uation 3-1 p ertains
to t h e currents w h ic h flow in one
si d e of t he am p lifier . 1 s
is eit h er p ositive or negative, de-
pend i ng on w h et h er
it a dd s to or s u btracts from
ID .
Ι ρ
re p resents t h e
FE T d rain current . It originates f r om α co n -
stant current source
and is t he same in eac h si de of t he
am p lifier . T h is e q u atio
n
also s
h ows t h at t he load current is
d ependen t on t he interaction betwee n t he diffe r ential
cur r ent (1 s ) and t he positio n i ng current ( Ιρ ) .
To un d ersta n
d t h e ope r ation of t h is circuit, first assume
t h at the am
p
lifier
is op erating i n α balance d con d ition
w h ere the two p ositioning currents are eq ual
( ΙΡ 1
=
ΙΡ 2)
and t h ere is no voltage difference
between t he two h ig h
impedan ce in p uts (1 s =
0) .
In
t h is case, t h e loa d cu rrents on
each side of t he am p lifie r are e q ual to
1
LO
.
E q uatio n 3-1,
t h en, becomes :
ILO = I L 1 = I L 2 = ΙΡ 1 - ID = ΙΡ 2 - ID

(
Eq uatio n 3-2)
To ill u strate t he effect t h e hig h im p e d ance inp u ts have
on
t h
e
loa d current, assume t h at α d ifference in voltage is
app lied across t he gates of Q1A and 01 Β , ma k i ng t h e gate
of Q1A more positive . T h is voltage differential causes d if-
ferential curre n t 1 s to flow t h roug h so u rce co u p li n g resist-
ance R s . W it h t h is a dd itional current (1 s ) flowing t
h roug h
QlA, less cu rr e n t is nee d ed from
Q2A
to
k
ee p
d rain current
Ι ρ con stant .
T h
e
current con d ucte d by Q2A is t h us
re duced to
ID
- 1S . Si
n
ce
t
h e p ositio
n ing c
u
rrent
ΙΡ 1,
w
h ic h
su pp
lies t he current cond ucte d by Q2A, is also
con-
stant, t h ere is α su r p lus of p ositio n i ng current
created e q ual
to IS w h ic h must be condu cted b y Q5,and
t h erefore R
L1 .
T he loa d current is increased to
1L1
=
1 LO
+
IS
. On t he
ot h er si de of t he am p lifie r , t
h
e
curre n t t h ro u g h 02 Β is
i n crease d to

Ι ρ
+
IS,
w h
ic h
d ecreases t h e loa d current
t h roug h Q6 an dR
L2
to
I L2
=
ILO
-
1S . For t h is
exam p le,
it ca n be see n t h at w h enever α d ifferential voltage occurs
b
etween t he two h ig h impe d a n ce i n puts, t he load cur r ents
cha
n
ge,
t h us ch anging t he voltage p otential betwee n t h e
deflection p
lates of t he CR T .
To illust r ate t he effect t he p ositioni ng curre n ts h ave on
t h
e
loa
d
c u rrents, ass u me t h at t he voltages at t he h ig h