Tektronix TDS 684A - Page 259

Command Descriptions
TDS Family Oscilloscope Programmer Manual
2–241
SETHold
<Space>
?
FALL
RISe
TRIGger :
:
LOGIc
MAIn
CLOCk :
:
EDGE
:
FALL specifies falling edge.
RISe specifies rising edge.
TRIGGER:MAIN:LOGIC:SETHOLD:CLOCK:EDGE RISE
specifies the polarity as the rising edge.
TRIGger:MAIn:LOGIc:SETHold:CLOCk:LEVel
TDS 684A & 7XXA only
Sets or queries the main logic setup/hold clock voltage trigger level. This is
equivalent to selecting Levels from the main Trigger menu and Clock Level in
the resulting side menu.
Trigger
TRIGger:MAIn:LOGIc:SETHold:CLOCk:LEVel { ECL | TTL | <NR3> }
TRIGger:MAIn:LOGIc:SETHold:CLOCk:LEVel?
<NR3>
TTL
ECL
CLOCk
<Space>
?
TRIGger :
:
LOGIc
MAIn
:
:
SETHold
LEVel
:
ECL specifies a preset ECL level of –1.3 V.
TTL specifies a preset TTL level of 1.4 V.
<NR3> is the main trigger level, in volts.
TRIGGER:MAIN:LOGIC:SETHOLD:CLOCK:LEVEL 1.4
sets the main logic trigger setup/hold clock level to 1.4 volts.
Arguments
Examples
Group
Syntax
Arguments
Examples