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Tektronix TDS 700A - Page 132

Tektronix TDS 700A
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Typical Characteristics
2–28
TDS 500B, TDS 600B & TDS 700A Performance Verification and Specifications
6
The minimum signal levels required for stable pulse width or glitch triggering of an acquisition. Also, see the footnote for
Sensitivity, Edge-Type Trigger, DC Coupled in this table. (Stable counting of events is counting that misses no events.)
7
For Logic, time between channels refers to the length of time a logic state derived from more than one channel must exist
to be recognized. For Events, the time is the minimum time between a main and delayed event that will be recognized if
more than one channel is used.
8
For Slew Rate Triggering, this is the minimum transition time, defined to be the time the user’s signal spends between the
two trigger threshold settings.

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