Texas Instruments bq78350-R1

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SLUUBM6–March 2018

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bq78350-R1 TRM Addendum for the bq78350-R2 Device

Preface

SLUUBM6–March 2018

bq78350-R1 TRM Addendum for the bq78350-R2 Device

This document is an addendum to the bq78350-R1 Technical Reference Manual (TRM, SLUUBD3) and

discusses modifications relating to the bq78350-R2 device. Items not discussed in this addendum have

not changed.

Notational Conventions

Information Type Formatting Convention Example

Commands Italics with parentheses and no breaking spaces RemainingCapacity() command

Data Flash (DF) Italics, bold, and breaking spaces Design Capacity data

Data flash bits Brackets, italics, and bold [LED1] bit

Modes and states ALL CAPITALS UNSEALED mode

Related Documentation from Texas Instruments

The following is related documentation:

1. bq78350-R1 Technical Reference Manual (SLUUBD3)

2. bq78350-R1 CEDV Li-Ion Gas Gauge and Battery Management Controller Companion to the bq769x0

Battery Monitoring AFE Data Sheet (SLUSCD0)

3. bq78350 Data Memory Programming for Mass Production Application Report (SLUA742)

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Glossary

TI Glossary —This glossary lists and explains terms, acronyms, and definitions.

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Summary

Added Features

PRE-DISCHARGE Mode

Details the new PRE-DISCHARGE functionality using the GPIO_B pin for pre-discharge control.

JEITA Charge Control and Temperature Ranges

Introduces JEITA charge control and modified temperature range settings.

Charging Parameter Updates

Covers updated Voltage and Current parameters for Low, Standard, High, and Recommended Temp Charging.

Pre-Charging and Maintenance Charging Settings

Details updates to Pre-Charging, Maintenance Charging, and Voltage Range settings.

Changed and Removed Features

IPScale Feature Optimization

Describes the optimization of the IPScale feature from the previous device version.

Static DF Checksum Fix

Addresses an issue with Static DF Checksum calculation across different devices.

LPEN Functionality Modification

Modifies LPEN functionality with a new data flash control bit [DIS_AFE_TIME_RECOV].

Overview

The bq78350-R2 device is an advanced battery management controller, serving as a modified version of the bq78350-R1. This document details the specific enhancements and alterations introduced in the R2 version, focusing on functionality and features that differentiate it from its predecessor. Users of the bq78350-R2 device will need to program the bq78350-R1 device with TI-provided bq78350-R2 firmware, ensuring that the package and pinout remain consistent with the R1 version, with the exception of some modified functionality associated with the GPIO_B pin.

A key new feature in the bq78350-R2 is the PRE-DISCHARGE Mode. This mode provides pre-discharge control functionality via the GPIO_B pin (pin 28), designed for use with a high-side PFET. The GPIO_B pin operates as an open-drain output, intended to drive the gate of an NFET with its source at ground. When the NFET is activated, it pulls down the PFET gate, enabling pre-discharge. Conversely, when the NFET is turned off, the PFET gate is pulled up, turning off the PFET and disabling pre-discharge.

The pre-discharge sequence is initiated when the DSG FET is off, and the bq78350-R2 receives a request to turn it on, provided no charging current above the Charge Current Threshold is detected. In this scenario, the device enters a pre-discharge phase for a duration specified by the Pre-Discharge:[FET ON Time]. Upon expiration of this time, the pre-discharge phase is disabled, and the DSG FET is turned on. However, if a charging current above the Charge Current Threshold is detected while the DSG FET is off and a turn-on request is received, the bq78350-R2 will bypass the pre-discharge phase and immediately activate the DSG FET. During the pre-discharge phase, if any fault (such as ACSD, AOLD, OTD, UTD) that would typically disable the DSG FET occurs, the pre-discharge phase is immediately disabled, and the DSG FET remains off until all such faults are cleared.

The FET Options register in the data flash includes specific bits to enable/disable the pre-discharge functionality and control the polarity of the GPIO_B signaling. The PDSG_EN bit enables the GPIO_B pin for PRE-DISCHARGE mode. If PDSG_EN is 0, GPIO_B is not used for this mode; if 1, it controls GPIO_B under the normal charge control algorithm. The PDSG_POL bit configures the GPIO_B pin output polarity for PRE-DISCHARGE mode. A value of 0 sets GPIO_B as active low (default), while 1 configures it as active high, requiring an external pull-up. The Pre-Discharge:[FET ON Time] setting, found in the Power subclass under Pre-Discharge, specifies the duration of this phase.

The bq78350-R2 also introduces JEITA Charge Control, a significant enhancement not present in the bq78350-R1. This functionality required modifications to some existing data flash addresses to accommodate the additional address space. The class name for charge algorithms has been updated from Charge Algorithm to Advanced Charge Algorithm.

The Temperature Ranges for charging have been refined and expanded. Previously, ranges included Precharge Temp, Charge Inhibit/Suspend Low Temp, Charge Inhibit High Temp, and Charge Suspend High Temp. These have been replaced with a more granular set: T1 Temp, T2 Temp, T5 Temp, T6 Temp, T3 Temp, and T4 Temp. Each of these defines specific temperature thresholds for various charging phases. For instance, T1 Temp sets the low temperature range lower limit, T2 Temp defines the low temperature range to standard temperature range, T5 Temp specifies the recommended temperature range lower limit, and T6 Temp sets the recommended temperature range upper limit. T3 Temp delineates the standard temperature range to high temperature range, and T4 Temp marks the high temperature range upper limit. An additional Hysteresis Temp setting is applied when the temperature is decreasing, preventing rapid switching between charge modes.

Fast Charging parameters have been significantly reorganized and expanded. The previous Fast Charging → Voltage and Current structure has been replaced with a more detailed breakdown across different temperature ranges and current levels. This now includes:

Low Temp Charging → Voltage
Low Temp Charging → Current Low
Low Temp Charging → Current Med
Low Temp Charging → Current High
Standard Temp Charging → Voltage
Standard Temp Charging → Current Low
Standard Temp Charging → Current Med
Standard Temp Charging → Current High
High Temp Charging → Voltage
High Temp Charging → Current Low
High Temp Charging → Current Med
High Temp Charging → Current High
Rec Temp Charging → Voltage
Rec Temp Charging → Current Low
Rec Temp Charging → Current Med
Rec Temp Charging → Current High

Each of these new parameters allows for fine-tuned control over charging voltage and current within specific temperature ranges, optimizing battery life and safety under varying environmental conditions.

Pre-Charging functionality has been streamlined. While Pre-Charging → Current is retained, the Start Voltage and Recovery Voltage parameters have been removed, simplifying the pre-charge configuration.

Maintenance Charging now includes Maintenance Charging → Current, allowing for specific current settings during maintenance charging phases.

The Voltage Range data flash parameters have been expanded to include:

Voltage Range → Pre-charge Start Voltage
Voltage Range → Charging Voltage Low
Voltage Range → Charging Voltage Med
Voltage Range → Charging Voltage High
Voltage Range → Charging Voltage Hysteresis

Pre-charge Start Voltage defines the minimum cell voltage required to enter PRECHARGE mode. Charging Voltage Low, Med, and High define the voltage ranges for different charging stages, while Charging Voltage Hysteresis is applied when voltage is decreasing.

Regarding Changed and Removed Features, the IPScale feature from the bq78350-R1 has been further optimized in this release. The Static DF Checksum issue, where the checksum returned different values across devices due to varying special DF values, has been resolved. Now, all devices will return the same checksum when the same srec is loaded.

The LPEN Functionality has been modified to provide an additional recovery mechanism. In the bq78350-R1, the [LPEN] feature disabled the CHG FET upon detection of a fault that would disable the DSG FET. Recovery occurred after a specified Recovery time or when the LOAD_PRESENT signal from the bq769x0 was cleared. The bq78350-R2 introduces a new data flash control bit, [DIS_AFE_TIME_RECOV].

If [LPEN] is set and [DIS_AFE_TIME_RECOV] is cleared, the CHG and DSG FETs turn back on after the Recovery time or when LOAD_PRESENT is cleared, mirroring the bq78350-R1 behavior.
If [LPEN] is set and [DIS_AFE_TIME_RECOV] is also set, the CHG and DSG FETs will only turn back on when the LOAD_PRESENT signal is detected.
If [LPEN] is cleared, the DSG FET will turn back on after the Recovery time. The CHG FET, not having been disabled solely due to the DSG FET's disablement, will typically remain on. This also mirrors the bq78350-R1 operation. It is important to note that if [LPEN] is cleared, then [DIS_AFE_TIME_RECOV] should also be cleared.

These comprehensive changes in the bq78350-R2 device aim to provide more robust control, enhanced safety features, and greater flexibility in battery management applications.